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Sat, 29 Oct 2022 14:54:39 -0700 (PDT) Message-ID: <53bc627f-0c3b-3417-d8af-6ced80eecc97@linaro.org> Date: Sun, 30 Oct 2022 00:54:38 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH 03/15] phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode Content-Language: en-GB To: Manivannan Sadhasivam , martin.petersen@oracle.com, jejb@linux.ibm.com, andersson@kernel.org, vkoul@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, quic_cang@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-scsi@vger.kernel.org References: <20221029141633.295650-1-manivannan.sadhasivam@linaro.org> <20221029141633.295650-4-manivannan.sadhasivam@linaro.org> From: Dmitry Baryshkov In-Reply-To: <20221029141633.295650-4-manivannan.sadhasivam@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221029_145442_167656_24BCC296 X-CRM114-Status: GOOD ( 20.18 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 29/10/2022 17:16, Manivannan Sadhasivam wrote: > Add separate tables_hs_g4 instance to allow the PHY driver to configure the > PHY in HS G4 mode. The individual SoC configs need to supply the Rx, Tx and > PCS register setting in tables_hs_g4 and the UFS driver can request the > Hs G4 mode by calling phy_set_mode_ext() with submode set to UFS_HS_G4. > > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov (Especially if changed to qmp_ufs_init_registers()). > --- > drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > index 4c6a2b5afc9a..5f2a012707b7 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c > @@ -553,6 +553,8 @@ struct qmp_phy_cfg { > const struct qmp_phy_cfg_tables tables; > /* Additional sequence for HS Series B */ > const struct qmp_phy_cfg_tables tables_hs_b; > + /* Additional sequence for HS G4 */ > + const struct qmp_phy_cfg_tables tables_hs_g4; > > /* clock ids to be requested */ > const char * const *clk_list; > @@ -587,6 +589,7 @@ struct qmp_phy_cfg { > * @pcs_misc: iomapped memory space for lane's pcs_misc > * @qmp: QMP phy to which this lane belongs > * @mode: PHY mode configured by the UFS driver > + * @submode: PHY submode configured by the UFS driver > */ > struct qmp_phy { > struct phy *phy; > @@ -600,6 +603,7 @@ struct qmp_phy { > void __iomem *pcs_misc; > struct qcom_qmp *qmp; > u32 mode; > + u32 submode; > }; > > /** > @@ -993,8 +997,12 @@ static int qmp_ufs_power_on(struct phy *phy) > qmp_ufs_serdes_init(qphy, &cfg->tables_hs_b); > > qmp_ufs_lanes_init(qphy, &cfg->tables); > + if (qphy->submode == UFS_HS_G4) > + qmp_ufs_lanes_init(qphy, &cfg->tables_hs_g4); > > qmp_ufs_pcs_init(qphy, &cfg->tables); > + if (qphy->submode == UFS_HS_G4) > + qmp_ufs_pcs_init(qphy, &cfg->tables_hs_g4); > > ret = reset_control_deassert(qmp->ufs_reset); > if (ret) > @@ -1083,6 +1091,7 @@ static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode) > struct qmp_phy *qphy = phy_get_drvdata(phy); > > qphy->mode = mode; > + qphy->submode = submode; > > return 0; > } -- With best wishes Dmitry -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy