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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v3 29/65] clk: socfpga: gate: Add a determine_rate hook Content-Language: en-US To: Maxime Ripard Cc: Michael Turquette , Stephen Boyd , =?UTF-8?Q?Andreas_F=c3=a4rber?= , Manivannan Sadhasivam , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Max Filippov , Charles Keepax , Richard Fitzgerald , Maxime Coquelin , Alexandre Torgue , Luca Ceresoli , David Lechner , Sekhar Nori , Abel Vesa , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Matthias Brugger , Geert Uytterhoeven , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ulf Hansson , Linus Walleij , David Airlie , Daniel Vetter , Vinod Koul , Kishon Vijay Abraham I , Alessandro Zummo , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Paul Cercueil , Orson Zhai , Baolin Wang , Chunyan Zhang , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, patches@opensource.cirrus.com, linux-stm32@st-md-mailman.stormreply.com, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-rtc@vger.kernel.org, linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org, linux-mips@vger.kernel.org References: <20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech> <20221018-clk-range-checks-fixes-v3-29-9a1358472d52@cerno.tech> <679921ee-98d4-d6ef-5934-e009fd4b31fc@kernel.org> From: Dinh Nguyen In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_120956_707835_9E04FC37 X-CRM114-Status: GOOD ( 26.15 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Maxime, On 4/25/23 09:48, Maxime Ripard wrote: > Hi Dinh, > > On Mon, Apr 24, 2023 at 01:32:28PM -0500, Dinh Nguyen wrote: >> On 4/4/23 05:11, Maxime Ripard wrote: >>> The SoCFGPA gate clock implements a mux with a set_parent hook, but >>> doesn't provide a determine_rate implementation. >>> >>> This is a bit odd, since set_parent() is there to, as its name implies, >>> change the parent of a clock. However, the most likely candidate to >>> trigger that parent change is a call to clk_set_rate(), with >>> determine_rate() figuring out which parent is the best suited for a >>> given rate. >>> >>> The other trigger would be a call to clk_set_parent(), but it's far less >>> used, and it doesn't look like there's any obvious user for that clock. >>> >>> So, the set_parent hook is effectively unused, possibly because of an >>> oversight. However, it could also be an explicit decision by the >>> original author to avoid any reparenting but through an explicit call to >>> clk_set_parent(). >>> >>> The latter case would be equivalent to setting the flag >>> CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook >>> to __clk_mux_determine_rate(). Indeed, if no determine_rate >>> implementation is provided, clk_round_rate() (through >>> clk_core_round_rate_nolock()) will call itself on the parent if >>> CLK_SET_RATE_PARENT is set, and will not change the clock rate >>> otherwise. __clk_mux_determine_rate() has the exact same behavior when >>> CLK_SET_RATE_NO_REPARENT is set. >>> >>> And if it was an oversight, then we are at least explicit about our >>> behavior now and it can be further refined down the line. >>> >>> Signed-off-by: Maxime Ripard >>> --- >>> drivers/clk/socfpga/clk-gate.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c >>> index 32ccda960f28..cbba8462a09e 100644 >>> --- a/drivers/clk/socfpga/clk-gate.c >>> +++ b/drivers/clk/socfpga/clk-gate.c >>> @@ -110,6 +110,7 @@ static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk, >>> static struct clk_ops gateclk_ops = { >>> .recalc_rate = socfpga_clk_recalc_rate, >>> + .determine_rate = __clk_mux_determine_rate, >>> .get_parent = socfpga_clk_get_parent, >>> .set_parent = socfpga_clk_set_parent, >>> }; >>> @@ -166,7 +167,7 @@ void __init socfpga_gate_init(struct device_node *node) >>> init.name = clk_name; >>> init.ops = ops; >>> - init.flags = 0; >>> + init.flags = CLK_SET_RATE_NO_REPARENT; >>> init.num_parents = of_clk_parent_fill(node, parent_name, SOCFPGA_MAX_PARENTS); >>> if (init.num_parents < 2) { >>> >> >> This patch broke SoCFPGA boot serial port. The characters are mangled. > > Do you have any other access to that board? If so, could you dump > clk_summary in debugfs with and without that patch? > That dump from the clk_summary are identical for both cases. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy