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Wed, 03 Jun 2026 08:14:32 +0200 Received: from localhost ([127.0.0.1]) by sslproxy05.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1wUes3-0000R1-18; Wed, 03 Jun 2026 08:14:32 +0200 From: Alexander Stein To: Vladimir Oltean Cc: linux-phy@lists.infradead.org, Ioana Ciornei , Vinod Koul , Neil Armstrong , Tanjeff Moos , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski , Rob Herring Subject: Re: [PATCH v2 phy-next 13/15] dt-bindings: phy: lynx-10g: initial document Date: Wed, 03 Jun 2026 08:14:31 +0200 Message-ID: <5829252.LvFx2qVVIh@steina-w> Organization: TQ-Systems GmbH In-Reply-To: <20260602090356.ewl5bezjxyqys6ee@skbuf> References: <20260529171509.1163787-1-vladimir.oltean@nxp.com> <2842502.mvXUDI8C0e@steina-w> <20260602090356.ewl5bezjxyqys6ee@skbuf> MIME-Version: 1.0 X-Virus-Scanned: Clear (ClamAV 1.4.3/28019/Tue Jun 2 08:33:27 2026) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260603_071445_957355_034BE91F X-CRM114-Status: GOOD ( 30.21 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Valdimir, Am Dienstag, 2. Juni 2026, 11:03:56 CEST schrieb Vladimir Oltean: > Hi Alexander, > = > On Mon, Jun 01, 2026 at 08:34:25AM +0200, Alexander Stein wrote: > > Hi, > > = > > Am Freitag, 29. Mai 2026, 19:15:07 CEST schrieb Vladimir Oltean: > > > Add a schema for the 10G Lynx SerDes. This is very similar to the mod= ern > > > form of the 28G Lynx SerDes, which is very much the intention. > > > = > > > We allow both forms of #phy-cells =3D <1> in the top-level provider > > > and #phy-cells =3D <0> in the per-lane provider for more flexibility = to > > > consumers, and because the kernel code is shared with the 28G Lynx wh= ich > > > already has that support for compatibility reasons. > > > = > > > Signed-off-by: Vladimir Oltean > > > --- > > > Cc: devicetree@vger.kernel.org > > > Cc: Conor Dooley > > > Cc: Krzysztof Kozlowski > > > Cc: Rob Herring > > > = > > > v1->v2: > > > - move patch later in series, right before driver > > > - deliberately ignoring this Sashiko feedback: > > > https://lore.kernel.org/linux-phy/20260529125017.ifqunh52gdzhthdg@s= kbuf/ > > > --- > > > .../devicetree/bindings/phy/fsl,lynx-10g.yaml | 131 ++++++++++++++++= ++ > > > 1 file changed, 131 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10= g.yaml > > > = > > > diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml = b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml > > > new file mode 100644 > > > index 000000000000..993f076bba4e > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml > > > @@ -0,0 +1,131 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml > > > +$schema: http://devicetree.org/meta-schemas/core.yaml > > > + > > > +title: Freescale Lynx 10G SerDes PHY > > > + > > > +maintainers: > > > + - Vladimir Oltean > > > + > > > +description: > > > + The 10G Lynx is a multi-protocol SerDes block which handles networ= king, PCIe, > > > + SATA and other high-speed interfaces. It is present on most QorIQ = and > > > + Layerscape SoCs. The register map is common, but the integration is > > > + SoC-specific, with the differences consisting in register endianne= ss, the > > > + number of lanes, protocol converters available per lane and their = location in > > > + the PCCR registers. Some SoCs have multiple SerDes blocks and thos= e differ in > > > + their protocol capabilities per lane. > > > + > > > +properties: > > > + compatible: > > > + description: > > > + There is intentionally no generic fsl,lynx-10g compatible stri= ng due to > > > + the hardware inability to report its capabilities, despite hav= ing a > > > + common register map. > > > + enum: > > > + - fsl,ls1028a-serdes > > > + - fsl,ls1046a-serdes1 > > > + - fsl,ls1046a-serdes2 > > > + - fsl,ls1088a-serdes1 > > > + - fsl,ls1088a-serdes2 > > > + - fsl,ls2088a-serdes1 > > > + - fsl,ls2088a-serdes2 > > = > > Silly question: What about LS1043A? AFAIK it has a single serdes block. > > = > > Best regards > > Alexander > = > My understanding is that hardware validation for LS1043A was not > budgeted for the main two features why the lynx-10g driver is necessary: > RCW override for 1G <-> 10G dynamic protocol switching and KR link > training. As such, this SoC isn't supported by the SerDes driver in the > NXP BSP either. With the exception of 1G <-> 2.5G minor protocol > switching, having a lynx-10g driver would not be very useful for the > LS1043A as is, without a procedure from h/w validation to do RCW > override. Thanks for the explanation. If there is no need for serdes driver then good. I was just wondering why ls1043a was not in the list, although it's quite similar to ls1046a. Thanks and best regards, Alexander -- = TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/ -- = linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy