RE: [PATCH] phy: ti: gmii-sel: fix rgmii_id mode config

RE: [PATCH] phy: ti: gmii-sel: fix rgmii_id mode config

[Aleksandar Gerasimovski]

Hi there,

Any opinion about the patch? Or maybe I missed the active maintainers of this driver?

Regards,
Aleksandar

-----Original Message-----
From: Aleksandar Gerasimovski <aleksandar.gerasimovski@belden.com> 
Sent: Friday, July 25, 2025 10:47 AM
To: linux-kernel@vger.kernel.org; afd@ti.com; s-vadapalli@ti.com
Cc: Aleksandar Gerasimovski <Aleksandar.Gerasimovski@belden.com>
Subject: [PATCH] phy: ti: gmii-sel: fix rgmii_id mode config

Without setting this bit the RGMII_ID link does not work reliably, we have found this thanks to the U-boot cpsw-nuss driver that is setting it. The bit is undocumented in the AM64x reference manual (see CTRLMMR_ENET1_CTRL register).

This problem is not visible if the Kernel is booted by a U-boot with enabled networking, in our case we see the problem as the U-boot networking is not used, and it is disabled.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@belden.com>
---
 drivers/phy/ti/phy-gmii-sel.c | 41 ++++++++++++++++++++++++++++-------
 1 file changed, 33 insertions(+), 8 deletions(-)

diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c index ff5d5e29629f..60a1312acf33 100644
--- a/drivers/phy/ti/phy-gmii-sel.c
+++ b/drivers/phy/ti/phy-gmii-sel.c
@@ -210,19 +210,44 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_dm814 = {
 
 static const
 struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2), },
-	{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2), },
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x4, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x8, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0xC, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x10, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x14, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x18, 4, 4),
+	},
+	{
+		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2),
+		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x1C, 4, 4),
+	},
 };
 
 static const
 struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
 	.use_of_data = true,
+	.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE),
 	.regfields = phy_gmii_sel_fields_am654,  };
 
--
2.34.1

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Re: [PATCH] phy: ti: gmii-sel: fix rgmii_id mode config

[s-vadapalli]

On Tue, Aug 19, 2025 at 07:43:12AM +0000, Aleksandar Gerasimovski wrote:

Hello Aleksandar,

> Hi there,
> 
> Any opinion about the patch? Or maybe I missed the active maintainers of this driver?

There is a v3 patch for this already at:
https://lore.kernel.org/r/20250819065622.1019537-1-mwalle@kernel.org/

Regards,
Siddharth.

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