From: Liu Ying <victor.liu@nxp.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org, kishon@ti.com,
robh+dt@kernel.org, krzk+dt@kernel.org, andrzej.hajda@intel.com,
narmstrong@baylibre.com, robert.foss@linaro.org,
Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
jernej.skrabec@gmail.com, airlied@linux.ie, daniel@ffwll.ch,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
agx@sigxcpu.org, robert.chiras@nxp.com,
martin.kepplinger@puri.sm
Subject: Re: [PATCH resend v8 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
Date: Wed, 20 Apr 2022 18:46:07 +0800 [thread overview]
Message-ID: <7554f8419ec9fd0e29db24bbe996fe012633c2ca.camel@nxp.com> (raw)
In-Reply-To: <Yl+2hOIcr6CrOv+T@matsya>
On Wed, 2022-04-20 at 13:00 +0530, Vinod Koul wrote:
> On 19-04-22, 09:08, Liu Ying wrote:
> > Hi,
> >
> > This is the v8 series to add i.MX8qxp LVDS PHY mode support for the
> > Mixel
> > PHY in the Freescale i.MX8qxp SoC.
> >
> > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in
> > either
> > MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by
> > i.MX8qxp
> > SCU firmware. The PHY driver would call a SCU function to
> > configure the
> > mode.
> >
> > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq
> > SoC,
> > where it appears to be a single MIPI DPHY.
> >
> >
> > Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host
> > controller
> > bridge driver, since i.MX8qxp SoC embeds this controller IP to
> > support
> > MIPI DSI displays together with the Mixel PHY.
> >
> > Patch 2/5 allows LVDS PHYs to be configured through the generic PHY
> > functions
> > and through a custom structure added to the generic PHY
> > configuration union.
> >
> > Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to
> > json-schema.
> >
> > Patch 4/5 adds dt binding support for the Mixel combo PHY in
> > i.MX8qxp SoC.
> >
> > Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY
> > driver.
>
> Applied patch 2-5 to phy-next, thanks
Now that patch 2-5 landed in phy-next, patch 1 is needed to explicitly
set MIPI DPHY mode in the nwl-dsi drm bridge driver, otherwise, i.MX8mq
MIPI DSI display feature will be broken due to the phy mode check added
in patch 5.
I'm assuming patch 1 should go through drm-misc. Robert/drm folks, can
you please pick it up?
Thanks,
Liu Ying
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
prev parent reply other threads:[~2022-04-20 10:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-19 1:08 [PATCH resend v8 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support Liu Ying
2022-04-19 1:08 ` [PATCH resend v8 1/5] drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set() Liu Ying
2022-04-22 14:16 ` Robert Foss
2022-04-22 17:24 ` Guido Günther
2022-04-29 12:30 ` Liu Ying
2022-05-06 8:53 ` Guido Günther
2022-04-19 1:08 ` [PATCH resend v8 2/5] phy: Add LVDS configuration options Liu Ying
2022-04-19 1:08 ` [PATCH resend v8 3/5] dt-bindings: phy: Convert mixel, mipi-dsi-phy to json-schema Liu Ying
2022-04-19 1:08 ` [PATCH resend v8 4/5] dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp Liu Ying
2022-04-19 1:08 ` [PATCH resend v8 5/5] phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support Liu Ying
2022-04-20 7:30 ` [PATCH resend v8 0/5] phy: " Vinod Koul
2022-04-20 10:46 ` Liu Ying [this message]
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