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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b16792aabfsm1657287a91.12.2026.11.09.17.37.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Nov 2026 17:37:38 -0800 (PST) Message-ID: <81e91f05-f172-4bbf-b5a6-76f2767ea82b@gmail.com> Date: Tue, 10 Nov 2026 09:37:35 +0800 X-Archived-By: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 4/4] phy: nuvoton: phy-ma35d1-usb2: extend to dual-port with OTG support To: sashiko-reviews@lists.linux.dev Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com References: <20261109065606.62641-1-a0987203069@gmail.com> <20261109065606.62641-5-a0987203069@gmail.com> Content-Language: en-US From: Joey Lu In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261109_173740_466705_F6DBCB66 X-CRM114-Status: GOOD ( 20.68 ) X-Spam-Score: -1.8 (-) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" X-Spam-Status: No, score=-7.3 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,FROM_LOCAL_HEX,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On 11/9/2026 3:14 PM, sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential > issue to consider: > - [Medium] phy: nuvoton: missing MFD_SYSCON select and unchecked > regmap_read() > -- > > commit ce87e45e509dca5386021bb0dd4e3bb91e3935d8 > Author: Joey Lu > > phy: nuvoton: phy-ma35d1-usb2: extend to dual-port with OTG support > > This commit extends the Nuvoton MA35D1 USB 2.0 PHY driver to support both > PHY0 and PHY1, updates clock-stability polling in phy_init(), registers a > read-only USB role switch for PHY0, and adds resistor calibration and > over-current polarity device-tree properties. > >> diff --git a/drivers/phy/nuvoton/Kconfig b/drivers/phy/nuvoton/Kconfig >> index d02cae2db315a..1f37e860de507 100644 >> --- a/drivers/phy/nuvoton/Kconfig >> +++ b/drivers/phy/nuvoton/Kconfig >> @@ -6,6 +6,7 @@ config PHY_MA35_USB >> tristate "Nuvoton MA35 USB2.0 PHY driver" >> depends on ARCH_MA35 || COMPILE_TEST >> depends on OF >> + depends on USB_ROLE_SWITCH || !USB_ROLE_SWITCH >> select GENERIC_PHY >> help >> Enable this to support the USB2.0 PHY on the Nuvoton MA35 >> diff --git a/drivers/phy/nuvoton/phy-ma35d1-usb2.c b/drivers/phy/nuvoton/phy-ma35d1-usb2.c >> index 0b9976fb15c17..bc706356c4341 100644 >> --- a/drivers/phy/nuvoton/phy-ma35d1-usb2.c >> +++ b/drivers/phy/nuvoton/phy-ma35d1-usb2.c > [ ... ] > >> +static int ma35_usb_phy_init(struct phy *phy) >> +{ >> + struct ma35_phy_port *port = phy_get_drvdata(phy); >> + struct ma35_usb_phy *p = container_of(port - port->idx, >> + struct ma35_usb_phy, port[0]); >> + unsigned int n = port->idx; >> unsigned int val; >> int ret; >> >> - ret = clk_prepare_enable(p_phy->clk); >> - if (ret < 0) { >> - dev_err(p_phy->dev, "Failed to enable PHY clock: %d\n", ret); >> - return ret; >> - } >> + ret = clk_prepare_enable(p->clk); >> + if (ret) >> + return dev_err_probe(p->dev, ret, "failed to enable clock\n"); >> >> - regmap_read(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, &val); >> - if (val & PHY0SUSPEND) { >> - /* >> - * USB PHY0 is in operation mode already >> - * make sure USB PHY 60 MHz UTMI Interface Clock ready >> - */ >> - ret = regmap_read_poll_timeout(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, val, >> - val & PHY0DEVCKSTB, 10, 1000); >> - if (ret == 0) >> - return 0; >> - } >> + regmap_read(p->sysreg, MA35_SYS_USBPMISCR, &val); >> >> - /* >> - * reset USB PHY0. >> - * wait until USB PHY0 60 MHz UTMI Interface Clock ready >> - */ >> - regmap_update_bits(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, 0x7, (PHY0POR | PHY0SUSPEND)); >> + if ((val & USBPMISCR_PHY_SUSPEND(n)) && >> + !ma35_usb_phy_wait_ready(p, n, &val)) >> + goto out; > [ ... ] > >> +static enum usb_role ma35_role_sw_get(struct usb_role_switch *sw) >> +{ >> + struct ma35_usb_phy *p = usb_role_switch_get_drvdata(sw); >> + u32 val; >> + >> + regmap_read(p->sysreg, MA35_SYS_PWRONOTP, &val); >> + >> + return (val & PWRONOTP_USBP0ID) ? USB_ROLE_HOST : USB_ROLE_DEVICE; >> +} > [Severity: Medium] > Can val be used uninitialized in ma35_usb_phy_init() and > ma35_role_sw_get() when regmap_read() fails or is stubbed out? > > Neither PHY_MA35_USB nor ARCH_MA35 selects MFD_SYSCON, so PHY_MA35_USB can > be built with CONFIG_MFD_SYSCON=n and CONFIG_REGMAP=n. In that > configuration, syscon_regmap_lookup_by_phandle() always fails with > -ENOTSUPP, and the regmap_read() stub returns -EINVAL without writing val, > causing the compiler to flag val as uninitialized in ma35_usb_phy_init() > and ma35_role_sw_get(). > > Selecting MFD_SYSCON in PHY_MA35_USB and checking the regmap_read() return > value (or initializing val) would avoid both issues. MFD_SYSCON: valid in part. Neither ARCH_MA35 nor PHY_MA35_USB selects MFD_SYSCON, and with CONFIG_REGMAP=n the regmap_read() stub returns -EINVAL without writing val, so the compiler can warn about val being uninitialized. In practice the probe would already fail at syscon_regmap_lookup_by_phandle() (-ENOTSUPP) and never reach those paths. The missing dependency is the real problem, so in v9 I'll add "select MFD_SYSCON" to PHY_MA35_USB (it selects REGMAP_MMIO as well). I'll keep regmap_read() unchecked as discussed with Mani, since once syscon is guaranteed the reads are plain MMIO and do not fail. Joey -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy