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[194.230.148.227]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b663470sm14309214f8f.27.2025.04.01.08.21.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Apr 2025 08:21:01 -0700 (PDT) Message-ID: <82f5fe14-3d98-4bd6-b5b5-852c8350edd8@gmail.com> Date: Tue, 1 Apr 2025 17:20:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/2] phy: qcom: pcie: Determine has_nocsr_reset dynamically To: Wenbin Yao , vkoul@kernel.org, kishon@kernel.org, p.zabel@pengutronix.de, dmitry.baryshkov@linaro.org, abel.vesa@linaro.org, quic_qianyu@quicinc.com, neil.armstrong@linaro.org, manivannan.sadhasivam@linaro.org, quic_devipriy@quicinc.com, konrad.dybcio@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250319094544.3980357-1-quic_wenbyao@quicinc.com> <20250319094544.3980357-2-quic_wenbyao@quicinc.com> Content-Language: en-US From: Aleksandrs Vinarskis In-Reply-To: <20250319094544.3980357-2-quic_wenbyao@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250401_082104_018197_805D3F3E X-CRM114-Status: GOOD ( 17.61 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 3/19/25 10:45, Wenbin Yao wrote: > From: Konrad Dybcio > > Decide the in-driver logic based on whether the nocsr reset is present > and defer checking the appropriateness of that to dt-bindings to save > on boilerplate. > > Reset controller APIs are fine consuming a nullptr, so no additional > checks are necessary there. > > Signed-off-by: Konrad Dybcio > Signed-off-by: Wenbin Yao > Reviewed-by: Abel Vesa > Reviewed-by: Manivannan Sadhasivam > Reviewed-by: Philipp Zabel Successfully tested on Snapdragon X1-26-100 on Asus Zenbook A14. This fixes pcie6a_phy with "qcom,x1p42100-qmp-gen4x4-pcie-phy" as compatible, which was not working before. Tested-by: Aleksandrs Vinarskis > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 17 ++++------------- > 1 file changed, 4 insertions(+), 13 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index 018bbb300830..38dbe690f2d5 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -2969,8 +2969,6 @@ struct qmp_phy_cfg { > > bool skip_start_delay; > > - bool has_nocsr_reset; > - > /* QMP PHY pipe clock interface rate */ > unsigned long pipe_clock_rate; > > @@ -3934,7 +3932,6 @@ static const struct qmp_phy_cfg sm8550_qmp_gen4x2_pciephy_cfg = { > > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, > .phy_status = PHYSTATUS_4_20, > - .has_nocsr_reset = true, > > /* 20MHz PHY AUX Clock */ > .aux_clock_rate = 20000000, > @@ -3967,7 +3964,6 @@ static const struct qmp_phy_cfg sm8650_qmp_gen4x2_pciephy_cfg = { > > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, > .phy_status = PHYSTATUS_4_20, > - .has_nocsr_reset = true, > > /* 20MHz PHY AUX Clock */ > .aux_clock_rate = 20000000, > @@ -4087,7 +4083,6 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x2_pciephy_cfg = { > > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, > .phy_status = PHYSTATUS_4_20, > - .has_nocsr_reset = true, > }; > > static const struct qmp_phy_cfg x1e80100_qmp_gen4x4_pciephy_cfg = { > @@ -4121,7 +4116,6 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x4_pciephy_cfg = { > > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, > .phy_status = PHYSTATUS_4_20, > - .has_nocsr_reset = true, > }; > > static const struct qmp_phy_cfg x1e80100_qmp_gen4x8_pciephy_cfg = { > @@ -4153,7 +4147,6 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x8_pciephy_cfg = { > > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, > .phy_status = PHYSTATUS_4_20, > - .has_nocsr_reset = true, > }; > > static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls) > @@ -4456,12 +4449,10 @@ static int qmp_pcie_reset_init(struct qmp_pcie *qmp) > if (ret) > return dev_err_probe(dev, ret, "failed to get resets\n"); > > - if (cfg->has_nocsr_reset) { > - qmp->nocsr_reset = devm_reset_control_get_exclusive(dev, "phy_nocsr"); > - if (IS_ERR(qmp->nocsr_reset)) > - return dev_err_probe(dev, PTR_ERR(qmp->nocsr_reset), > - "failed to get no-csr reset\n"); > - } > + qmp->nocsr_reset = devm_reset_control_get_optional_exclusive(dev, "phy_nocsr"); > + if (IS_ERR(qmp->nocsr_reset)) > + return dev_err_probe(dev, PTR_ERR(qmp->nocsr_reset), > + "failed to get no-csr reset\n"); > > return 0; > } -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy