ipq8074 USB PHY

ipq8074 USB PHY

[Dmitry Baryshkov]

Hi Robert, Baruch,

We have been looking onto the QMP PHY programming in the upstream 
kernels. I noticed that the ipq8074_usb3phy_cfg uses usb3phy_regs_layout 
for the regs layout, however the Qualcomm's kernel ([1]) defines offsets 
which correspond to qmp_v3_usb3phy_regs_layout. As you seem to be 
working with this platform, could you please doublecheck which of 
layouts is correct? Thank you.

[1] 
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/tree/arch/arm64/boot/dts/qcom/qcom-ipq807x-soc.dtsi?h=NHSS.QSDK.9.0.2&id=894e56082ca89638c68b7cee039ac1b2a6cb4863#n1237

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With best wishes
Dmitry

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Re: ipq8074 USB PHY

[Robert Marko]

On Thu, 29 Sept 2022 at 13:26, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> wrote:
>
> Hi Robert, Baruch,
>
> We have been looking onto the QMP PHY programming in the upstream
> kernels. I noticed that the ipq8074_usb3phy_cfg uses usb3phy_regs_layout
> for the regs layout, however the Qualcomm's kernel ([1]) defines offsets
> which correspond to qmp_v3_usb3phy_regs_layout. As you seem to be
> working with this platform, could you please doublecheck which of
> layouts is correct? Thank you.

Hi Dmitry,
Unfortunately, I dont really have a way of for sure knowing which one
is correct as I dont
have any register docs.
However, QCA-s 5.4 kernel has been using usb3phy_regs_layout from the
start, that is how
QCA upstreamed it as well and so far USB3 has been working fine on
multiple boards I have
access to.

4.4 tree was kind of full of broken stuff that mostly got fixed in 5.4.

Regards,
Robert
>
> [1]
> https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/tree/arch/arm64/boot/dts/qcom/qcom-ipq807x-soc.dtsi?h=NHSS.QSDK.9.0.2&id=894e56082ca89638c68b7cee039ac1b2a6cb4863#n1237
>
> --
> With best wishes
> Dmitry

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Re: ipq8074 USB PHY

[Baruch Siach]

Hi Dmitry,

On Thu, Sep 29 2022, Dmitry Baryshkov wrote:
> We have been looking onto the QMP PHY programming in the upstream kernels. I
> noticed that the ipq8074_usb3phy_cfg uses usb3phy_regs_layout for the regs
> layout, however the Qualcomm's kernel ([1]) defines offsets which correspond
> to qmp_v3_usb3phy_regs_layout. As you seem to be working with this platform,
> could you please doublecheck which of layouts is correct? Thank you.
>
> [1]
> https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/tree/arch/arm64/boot/dts/qcom/qcom-ipq807x-soc.dtsi?h=NHSS.QSDK.9.0.2&id=894e56082ca89638c68b7cee039ac1b2a6cb4863#n1237

The platform I have access to is IPQ6018 based. Only USB2 signals are
connected on the board. I can't help with testing of USB3 PHY
initialization.  Sorry.

baruch

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