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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id u6-20020ac25186000000b0050e70a5b804sm2589732lfi.302.2024.01.24.05.22.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 05:22:59 -0800 (PST) Message-ID: <9feae876-5170-4b57-8cd4-dbf35dddbefc@linaro.org> Date: Wed, 24 Jan 2024 14:22:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/14] arm64: dts: qcom: sc8280xp: Drop PCIE_AUX_CLK from pcie_phy nodes Content-Language: en-US To: Manivannan Sadhasivam , Bjorn Andersson , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240124-pcie-aux-clk-fix-v1-0-d8a4852b6ba6@linaro.org> <20240124-pcie-aux-clk-fix-v1-9-d8a4852b6ba6@linaro.org> From: Konrad Dybcio In-Reply-To: <20240124-pcie-aux-clk-fix-v1-9-d8a4852b6ba6@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240124_052301_315187_6085D171 X-CRM114-Status: UNSURE ( 7.43 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 1/24/24 08:36, Manivannan Sadhasivam wrote: > PCIe PHY hw doesn't require PCIE_AUX_CLK for functioning. This clock is > only required by the PCIe controller. Hence drop it from pcie_phy nodes. > > Signed-off-by: Manivannan Sadhasivam > --- So, I have a small phytest module that basically does this: phy_get phy_init phy_set_mode_ext(PCIE_RC) phy_power_on To load it, I skip PCIe init (comment out the node), then wait for clk and pmdomain unused cleanup, then load the phytest module to ensure that I'm not piggybacking off of the RC's resources. I tried it out on the CRD, on PCIE2A (NVMe) Without this patch, the PHY seems to init fine With this patch, I get: (1) qcom-qmp-pcie-phy 1c24000.phy: phy initialization timed-out Kicking the PCIe GDSC from the PHY, I additionally get: (2) gcc_pcie_2a_cfg_ahb_clk status stuck at 'off' I think we expected (2), but is (1) okay? Konrad -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy