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bh=FkhJI2u81cWQQKkbpyLd60L537rqdrvEOTTOduSP8fc=; b=lDEouwh70SunD0CIWASRbWeFowTrGybIpcklgMde26dHzbTlVQO4tNpqeNvxp/DTQsoqLf MVjtKrPOCWqpHgHajsl9TS3Z3HbhRIpfUc1ER+yeSnCjIO3sw4GAhoSvOm0qOqbvwlTHrB x+gO9MKBp4xsCHTPNEnL2nYoU4H0Uz7b3WQc5J0o29raPzA+01q4oo01SleqCbz0BDqus+ +SOujwJmPYbFV9TLnY1ejbitcPWUig77tZIqCoYyaNv88N+8BWkg4GxKRwHhpKohvAc+Wg QN2E2KsPjss+wNTEiCqCvUKMlcm3LPj/suEerpCepkldM2ueNI7yNcP+xUABCg== Mime-Version: 1.0 Date: Tue, 28 Apr 2026 14:21:35 +0200 Message-Id: Cc: "Vinod Koul" , "Neil Armstrong" , "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Frank Li" , "Sascha Hauer" , "Pengutronix Kernel Team" , "Fabio Estevam" , , , , , , , , "Alexander Stein" , "Ying Liu" To: "Laurentiu Palcu" From: "Luca Ceresoli" Subject: Re: [PATCH v22 5/8] dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY X-Mailer: aerc 0.20.1 References: <20260424-dcss-hdmi-upstreaming-v22-0-30a28f89298d@oss.nxp.com> <20260424-dcss-hdmi-upstreaming-v22-5-30a28f89298d@oss.nxp.com> In-Reply-To: X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260428_052144_703412_8BED96F3 X-CRM114-Status: GOOD ( 23.97 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hello Laurentiu, On Mon Apr 27, 2026 at 4:35 PM CEST, Laurentiu Palcu wrote: > Hi Luca, > > On Mon, Apr 27, 2026 at 02:59:47PM +0200, Luca Ceresoli wrote: >> Hello Laurentiu, >> >> On Fri Apr 24, 2026 at 1:07 PM CEST, Laurentiu Palcu wrote: >> > From: Sandor Yu >> > >> > Add bindings for Freescale iMX8MQ DP and HDMI PHY. >> > >> > Signed-off-by: Sandor Yu >> > Signed-off-by: Laurentiu Palcu >> > --- >> > .../bindings/phy/fsl,imx8mq-hdptx-phy.yaml | 80 ++++++++++++++++++++++ >> > 1 file changed, 80 insertions(+) >> > >> > diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-hdptx-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-hdptx-phy.yaml >> > new file mode 100644 >> > index 0000000000000..a24435139b8b3 >> > --- /dev/null >> > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-hdptx-phy.yaml >> > @@ -0,0 +1,80 @@ >> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> > +%YAML 1.2 >> > +--- >> > +$id: http://devicetree.org/schemas/phy/fsl,imx8mq-hdptx-phy.yaml# >> > +$schema: http://devicetree.org/meta-schemas/core.yaml# >> > + >> > +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC >> > + >> > +maintainers: >> > + - Sandor Yu >> >> Based on what you said in the cover, I guess this line will have to be >> changed. Are you willing to maintain this binding? > > Yes, I'll update it in the next iteration. > >> >> > +description: >> > + The Cadence HDP-TX DP/HDMI PHY is a child node of the MHDP8501 bridge, >> > + sharing the same MMIO region as the parent bridge node. >> > + >> > +properties: >> > + compatible: >> > + const: fsl,imx8mq-hdptx-phy >> > + >> > + clocks: >> > + items: >> > + - description: PHY reference clock. >> > + - description: APB clock. >> > + >> > + clock-names: >> > + items: >> > + - const: ref >> > + - const: apb >> > + >> > + "#phy-cells": >> > + const: 0 >> > + >> > +required: >> > + - compatible >> > + - clocks >> > + - clock-names >> > + - "#phy-cells" >> > + >> > +additionalProperties: false >> > + >> > +examples: >> > + - | >> > + #include >> > + #include >> > + >> > + display-bridge@32c00000 { >> > + compatible = "fsl,imx8mq-mhdp8501"; >> > + reg = <0x32c00000 0x100000>; >> > + interrupts = , >> > + ; >> > + interrupt-names = "plug_in", "plug_out"; >> > + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; >> > + phys = <&dp_phy>; >> > + >> > + ports { >> > + #address-cells = <1>; >> > + #size-cells = <0>; >> >> The ports are not mentioned in the properties. I'm not a DT maintainer, but >> I think they should, e.g. to mention which port is the input and which is >> the output. >> >> > + >> > + port@0 { >> > + reg = <0>; >> > + endpoint { >> > + remote-endpoint = <&dcss_out>; >> > + }; >> > + }; >> > + >> > + port@1 { >> > + reg = <1>; >> > + endpoint { >> > + data-lanes = <2 1 0 3>; >> >> Having a remote-endpoint property would be nice here, to make the example >> more complete. > > The ports and the remote endpoints are documented in the bridge binding... Ah, my bad, I reviewed too quickly and mixed the phy and bridge bindings in my mind, sorry. > > However, I believe I screwed this example up by adding the entire bridge node, > instead of just a simple: > > mhdp { > phy { > compatible = "fsl,imx8mq-hdptx-phy"; > #phy-cells = <0>; > clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; > clock-names = "ref", "apb"; > }; > }; > > I'll simplify the example in the next iteration. Yes, I think it would make sense to do it. Thanks, Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy