From: Abel Vesa <abel.vesa@linaro.org>
To: Johan Hovold <johan@kernel.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/8] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550
Date: Wed, 18 Jan 2023 23:25:31 +0200 [thread overview]
Message-ID: <Y8hjy8WRpPh8DVvG@linaro.org> (raw)
In-Reply-To: <Y8giHJMtPu4wTlmA@hovoldconsulting.com>
On 23-01-18 17:45:16, Johan Hovold wrote:
> On Wed, Jan 18, 2023 at 02:53:21AM +0200, Abel Vesa wrote:
> > Document the QMP PCIe PHY compatible for SM8550.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > ---
> > .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> > index 8a85318d9c92..65f26cfff3fb 100644
> > --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> > +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
> > @@ -20,6 +20,8 @@ properties:
> > - qcom,sc8280xp-qmp-gen3x2-pcie-phy
> > - qcom,sc8280xp-qmp-gen3x4-pcie-phy
> > - qcom,sm8350-qmp-gen3x1-pcie-phy
> > + - qcom,sm8550-qmp-gen3x2-pcie-phy
> > + - qcom,sm8550-qmp-gen4x2-pcie-phy
> >
> > reg:
> > minItems: 1
>
> I don't think I'll have time to look at this week, but I did notice that
> you fail do describe the clocks, regulators, and resets (as you also
> did for the UFS PHY binding) which are currently different from
> sc8280xp.
Hmm, sorry about that. I will double check against the pcie phy nodes I
have for sm8550.
As for the UFS, if your are referring to the following patchset [1], the phy
node looks exactly the same as on sc8280xp, therefore no other binding
update, other than compatible, was needed.
[1] https://lore.kernel.org/all/20230117224148.1914627-2-abel.vesa@linaro.org/
>
> Please be more careful when adding compatible strings so we get this
> right. You should also double check that the differences are really
> warranted and not just due the vendor using different names for the same
> resource.
>
> At least the reset must be renamed ("pcie_1_nocsr_com_phy_reset", e.g.
> drop 'pcie' and 'reset', maybe more).
>
> Johan
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next prev parent reply other threads:[~2023-01-18 21:25 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 0:53 [PATCH v3 0/8] phy: qualcomm: Add PCIe support for SM8550 Abel Vesa
2023-01-18 0:53 ` [PATCH v3 1/8] dt-bindings: phy: Add QMP PCIe PHY comptible " Abel Vesa
2023-01-18 16:36 ` Rob Herring
2023-01-18 16:45 ` Johan Hovold
2023-01-18 21:25 ` Abel Vesa [this message]
2023-01-19 7:40 ` Johan Hovold
2023-01-18 0:53 ` [PATCH v3 2/8] phy: qcom-qmp: pcs: Add v6 register offsets Abel Vesa
2023-01-18 4:20 ` Dmitry Baryshkov
2023-01-18 0:53 ` [PATCH v3 3/8] phy: qcom-qmp: pcs: Add v6.20 " Abel Vesa
2023-01-18 4:25 ` Dmitry Baryshkov
2023-01-18 0:53 ` [PATCH v3 4/8] phy: qcom-qmp: pcs-pcie: Add v6 " Abel Vesa
2023-01-18 4:25 ` Dmitry Baryshkov
2023-01-18 0:53 ` [PATCH v3 5/8] phy: qcom-qmp: pcs-pcie: Add v6.20 " Abel Vesa
2023-01-18 4:26 ` Dmitry Baryshkov
2023-01-18 0:53 ` [PATCH v3 6/8] phy: qcom-qmp: qserdes-txrx: " Abel Vesa
2023-01-18 4:30 ` Dmitry Baryshkov
2023-01-18 0:53 ` [PATCH v3 7/8] phy: qcom-qmp: qserdes-lane-shared: Add v6 " Abel Vesa
2023-01-18 0:53 ` [PATCH v3 8/8] phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs Abel Vesa
2023-01-18 4:34 ` Dmitry Baryshkov
2023-01-18 23:34 ` Abel Vesa
2023-01-19 13:07 ` Dmitry Baryshkov
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