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From: Thierry Reding <thierry.reding@gmail.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Mathias Nyman <mathias.nyman@intel.com>,
	JC Kuo <jckuo@nvidia.com>, Jon Hunter <jonathanh@nvidia.com>,
	linux-tegra@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-usb@vger.kernel.org
Subject: Re: [PATCH v8 11/13] phy: tegra: xusb: Add wake/sleepwalk for Tegra186
Date: Thu, 1 Apr 2021 13:00:18 +0200	[thread overview]
Message-ID: <YGWnwhhiEZ596ct4@orome.fritz.box> (raw)
In-Reply-To: <YGVs5/57Z+6zKuQa@vkoul-mobl.Dlink>


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On Thu, Apr 01, 2021 at 12:19:11PM +0530, Vinod Koul wrote:
> On 25-03-21, 17:40, Thierry Reding wrote:
> > From: JC Kuo <jckuo@nvidia.com>
> > 
> > This commit implements Tegra186/Tegra194 XUSB PADCTL/AO wake and
> > sleepwalk operations.
> > 
> > Signed-off-by: JC Kuo <jckuo@nvidia.com>
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  drivers/phy/tegra/xusb-tegra186.c | 558 +++++++++++++++++++++++++++++-
> >  1 file changed, 557 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c
> > index 5d64f69b39a9..6378bf722745 100644
> > --- a/drivers/phy/tegra/xusb-tegra186.c
> > +++ b/drivers/phy/tegra/xusb-tegra186.c
> > @@ -1,6 +1,6 @@
> >  // SPDX-License-Identifier: GPL-2.0
> >  /*
> > - * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
> > + * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
> >   */
> >  
> >  #include <linux/delay.h>
> > @@ -113,6 +113,117 @@
> >  #define  ID_OVERRIDE_FLOATING			ID_OVERRIDE(8)
> >  #define  ID_OVERRIDE_GROUNDED			ID_OVERRIDE(0)
> >  
> > +/* XUSB AO registers */
> > +#define XUSB_AO_USB_DEBOUNCE_DEL		(0x4)
> > +#define   UHSIC_LINE_DEB_CNT(x)			(((x) & 0xf) << 4)
> > +#define   UTMIP_LINE_DEB_CNT(x)			((x) & 0xf)
> > +
> > +#define XUSB_AO_UTMIP_TRIGGERS(x)		(0x40 + (x) * 4)
> > +#define   CLR_WALK_PTR				(1 << 0)
> > +#define   CAP_CFG				(1 << 1)
> > +#define   CLR_WAKE_ALARM			(1 << 3)
> > +
> > +#define XUSB_AO_UHSIC_TRIGGERS(x)		(0x60 + (x) * 4)
> > +#define   HSIC_CLR_WALK_PTR			(1 << 0)
> > +#define   HSIC_CLR_WAKE_ALARM			(1 << 3)
> > +#define   HSIC_CAP_CFG				(1 << 4)
> > +
> > +#define XUSB_AO_UTMIP_SAVED_STATE(x)		(0x70 + (x) * 4)
> > +#define   SPEED(x)				((x) & 0x3)
> > +#define     UTMI_HS				SPEED(0)
> > +#define     UTMI_FS				SPEED(1)
> > +#define     UTMI_LS				SPEED(2)
> > +#define     UTMI_RST				SPEED(3)
> > +
> > +#define XUSB_AO_UHSIC_SAVED_STATE(x)		(0x90 + (x) * 4)
> > +#define   MODE(x)				((x) & 0x1)
> > +#define   MODE_HS				MODE(0)
> > +#define   MODE_RST				MODE(1)
> > +
> > +#define XUSB_AO_UTMIP_SLEEPWALK_CFG(x)		(0xd0 + (x) * 4)
> > +#define XUSB_AO_UHSIC_SLEEPWALK_CFG(x)		(0xf0 + (x) * 4)
> > +#define   FAKE_USBOP_VAL			(1 << 0)
> > +#define   FAKE_USBON_VAL			(1 << 1)
> > +#define   FAKE_USBOP_EN				(1 << 2)
> > +#define   FAKE_USBON_EN				(1 << 3)
> > +#define   FAKE_STROBE_VAL			(1 << 0)
> > +#define   FAKE_DATA_VAL				(1 << 1)
> > +#define   FAKE_STROBE_EN			(1 << 2)
> > +#define   FAKE_DATA_EN				(1 << 3)
> > +#define   WAKE_WALK_EN				(1 << 14)
> > +#define   MASTER_ENABLE				(1 << 15)
> > +#define   LINEVAL_WALK_EN			(1 << 16)
> 
> BIT() or GENMASK() please
> 
> > +static inline void ao_writel(struct tegra186_xusb_padctl *priv, u32 value, unsigned int offset)
> > +{
> > +	dev_dbg(priv->base.dev, "ao %08x < %08x\n", offset, value);
> 
> Too many debug prints in this patch as well...
> 
> With the nits fixed:
> 
> Acked-By: Vinod Koul <vkoul@kernel.org>

Done, thanks.

Thierry

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  reply	other threads:[~2021-04-01 11:00 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-25 16:40 [PATCH v8 00/13] Tegra XHCI controller ELPG support Thierry Reding
2021-03-25 16:40 ` [PATCH v8 01/13] clk: tegra: Add PLLE HW power sequencer control Thierry Reding
2021-03-25 16:40 ` [PATCH v8 02/13] clk: tegra: Don't enable PLLE HW sequencer at init Thierry Reding
2021-03-25 16:40 ` [PATCH v8 03/13] phy: tegra: xusb: Move usb3 port init for Tegra210 Thierry Reding
2021-03-30 14:12   ` Vinod Koul
2021-03-31 16:32     ` Thierry Reding
2021-04-01  5:15       ` Vinod Koul
2021-03-25 16:40 ` [PATCH v8 04/13] phy: tegra: xusb: Rearrange UPHY init on Tegra210 Thierry Reding
2021-03-30 14:20   ` Vinod Koul
2021-03-25 16:40 ` [PATCH v8 05/13] phy: tegra: xusb: Add Tegra210 lane_iddq operation Thierry Reding
2021-03-30 14:21   ` Vinod Koul
2021-03-31 16:36     ` Thierry Reding
2021-03-25 16:40 ` [PATCH v8 06/13] phy: tegra: xusb: Add sleepwalk and suspend/resume Thierry Reding
2021-03-30 14:23   ` Vinod Koul
2021-03-31 16:38     ` Thierry Reding
2021-03-31 16:45       ` Thierry Reding
2021-03-31 16:52         ` Thierry Reding
2021-03-25 16:40 ` [PATCH v8 07/13] soc/tegra: pmc: Provide USB sleepwalk register map Thierry Reding
2021-03-25 16:40 ` [PATCH v8 08/13] dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop Thierry Reding
2021-03-25 16:40 ` [PATCH v8 09/13] phy: tegra: xusb: Add wake/sleepwalk for Tegra210 Thierry Reding
2021-03-25 20:26   ` Nathan Chancellor
2021-03-26 12:44     ` Thierry Reding
2021-04-01  6:45   ` Vinod Koul
2021-04-01 10:44     ` Thierry Reding
2021-04-01 11:05   ` [PATCH v9 " Thierry Reding
2021-04-06  5:01     ` Vinod Koul
2021-04-06 13:58       ` Thierry Reding
2021-04-11 14:30         ` Vinod Koul
2021-03-25 16:40 ` [PATCH v8 10/13] phy: tegra: xusb: Tegra210 host mode VBUS control Thierry Reding
2021-04-01  6:45   ` Vinod Koul
2021-03-25 16:40 ` [PATCH v8 11/13] phy: tegra: xusb: Add wake/sleepwalk for Tegra186 Thierry Reding
2021-04-01  6:49   ` Vinod Koul
2021-04-01 11:00     ` Thierry Reding [this message]
2021-03-25 16:40 ` [PATCH v8 12/13] usb: host: xhci-tegra: Unlink power domain devices Thierry Reding
2021-03-25 16:40 ` [PATCH v8 13/13] xhci: tegra: Enable ELPG for runtime/system PM Thierry Reding

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