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From: Vinod Koul <vkoul@kernel.org>
To: Marek Vasut <marex@denx.de>
Cc: linux-phy@lists.infradead.org, Fabio Estevam <festevam@denx.de>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Marcel Ziswiler <marcel.ziswiler@toradex.com>,
	NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED
Date: Wed, 13 Apr 2022 15:06:42 +0530	[thread overview]
Message-ID: <YlaZqvKAQeGCNOQ9@matsya> (raw)
In-Reply-To: <20220312013812.169671-1-marex@denx.de>

On 12-03-22, 02:38, Marek Vasut wrote:
> The 'fsl,refclk-pad-mode' DT property used to select clock source for
> PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
> IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
> two options are handled correctly by the driver, the last one is not,
> this patch implements support for the last option.
> 
> The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
> the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
> internal PLL and output to PCIE_RESREF external IO pin. The last
> IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
> clock are sourced from SoC internal PLL and not output anywhere.

This does not apply on phy-next, please rebase

-- 
~Vinod

-- 
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  parent reply	other threads:[~2022-04-13  9:37 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-12  1:38 [PATCH] phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED Marek Vasut
2022-03-14  1:51 ` Hongxing Zhu
2022-03-14  2:51   ` Marek Vasut
2022-03-14  3:29     ` Hongxing Zhu
2022-03-14 10:52       ` Marek Vasut
2022-03-15  0:15         ` Hongxing Zhu
2022-04-13  9:36 ` Vinod Koul [this message]
2022-04-13 14:08   ` Marek Vasut

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