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[35.189.131.103]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2d8446f35eesm1119665a91.47.2024.08.28.01.47.47 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Aug 2024 01:47:47 -0700 (PDT) Received: from martinet by pc-0182.atmarktech with local (Exim 4.96) (envelope-from ) id 1sjELC-00CmWk-05; Wed, 28 Aug 2024 17:47:46 +0900 Date: Wed, 28 Aug 2024 17:47:35 +0900 From: Dominique Martinet To: Adam Ford Cc: linux-phy@lists.infradead.org, linux-imx@nxp.com, festevam@gmail.com, frieder.schrempf@kontron.de, aford@beaconembedded.com, Vinod Koul , Kishon Vijay Abraham I , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Marco Felsch , Lucas Stach , linux-kernel@vger.kernel.org, Makoto Sato Subject: Re: [RFC 2/2] phy: freescale: fsl-samsung-hdmi: Support dynamic integer divider Message-ID: References: <20240828024813.1353572-1-aford173@gmail.com> <20240828024813.1353572-2-aford173@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240828024813.1353572-2-aford173@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_014755_473936_5F6B9674 X-CRM114-Status: GOOD ( 20.75 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Adam Ford wrote on Tue, Aug 27, 2024 at 09:48:02PM -0500: > There is currently a look-up table for a variety of resolutions. > Since the phy has the ability to dynamically calculate the values > necessary to use the intger divider which should allow more > resolutions without having to update the look-up-table. If the > integer calculator cannot get an exact frequency, it falls back > to the look-up-table. Because the LUT algorithm does some > rounding, I did not remove integer entries from the LUT. Thank you! We're still running 5.10 so I backported the driver as of it's current state first (that part works), unfortunately our 51.2MHz display does not work with this. After phy_clk_round_rate() not round the pixel clock to the table values (otherwise we'd only get rounded values), and making phy_clk_set_rate() pass the requested `rate` instead of using the next smaller cfg->pixclk, the display no longer comes up. It comes up with the values obtained for 50.4MHz (next closest value), which also has an exact match so uses the integer divider this patch computes instead of the table values, but not with the 51.2MHz it requests... I'm afraid at this point I don't know how to debug that further without getting a scope out (I don't know if the soc isn't generating something correct or if the display actually doesn't like the frequency it requests?! the later could be checked by plugging it in to another PC that might support that frequency...), and that is going to take quite a while... Hopefully Frieder will have more success with his displays? It could also be very well due to some of the differences with our 5.10 tree, sorry about that. > static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, > const struct phy_config *cfg) > { > + u32 desired_clock = cfg->pixclk * 5; (I don't really understand where that `* 5` comes from, but I guess it's expected? works for other display and neighbor frequency anyway...) Thanks, -- Dominique -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy