Re: [PATCH v4 3/5] phy: qcom: edp: Add SC7280/SC8180X swing/pre-emphasis tables

From: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Vinod Koul <vkoul@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 3/5] phy: qcom: edp: Add SC7280/SC8180X swing/pre-emphasis tables
Date: Mon, 27 Apr 2026 14:27:19 +0800	[thread overview]
Message-ID: <a8f9fe96-1a5c-4eac-8a47-9dc993ced185@oss.qualcomm.com> (raw)
In-Reply-To: <ocydv6bbja7z46yjidtemwxtvwyxc4jpmnsc5uz7eorshgr36r@v4e7oo4sgeol>


On 4/23/2026 12:41 PM, Dmitry Baryshkov wrote:
> On Thu, Apr 23, 2026 at 11:28:44AM +0800, Yongxing Mou wrote:
>>
>>
>> On 4/22/2026 6:42 PM, Konrad Dybcio wrote:
>>> The swing and preem settings for HBR3 look OK
>>>
>>> For DP / low-Vdiff:
>>>
>>> .swing_hbr3_hbr2 OK
>>> .swing_hbr_rbr - I don't know. The docs are unclear whether the same
>>> settings should be used for RBR and HBR3, but maybe? There's a
>>> separate table for mini-DP but I doubt there's any poipu boards with
>>> such a connector (maybe some obscure ones)
>>>
>>> .pre_emphasis_hbr3_hbr2 OK
>>> .pre_emphasis_hbr_rbr same as above
>>>
>> Thanks for point this, so pre_emphasis_hbr_rbr same with
>> pre_emphasis_hbr3_hbr2?  I also don't get it's RBR or HBR3 from phy HPG. But
>> now i think only eDP will be used in upstreamed poipu boards. i check the
>> dts and not find any poipu boards will use DP mode(or mini DP)..
> 
> After checking the HPG, could you please actually talk to the colleagues
> who brough up the PHY on those platforms (with the downstreaam kernels)?
> They might know the details not captured in the HPG.
> 
The driver actually existed in the very first upstream version, but it 
didn’t use any tables back then.
On the downstream side, I couldn’t find any 7nm eDP PHY implementations 
either.
I tried reaching out to a few teams, but this platform is quite old and 
most people don’t really have context any more. My understanding is that 
it was primarily a compute-oriented chip, but I’m not very familiar with 
that code path myself. At this point, the only remaining option is to 
try contacting the hardware team to see if they have any additional 
insights.
Since this is unlikely to be resolved quickly, I’d like to proceed with 
posting the next revision first. For SC8180X, it should only ever be 
using eDP mode.


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