Re: [PATCH 2/2] phy: nuvoton: Add MA35D1 USB2 OTG PHY driver

From: Vinod Koul <vkoul@kernel.org>
To: Joey Lu <a0987203069@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Jacky Huang <ychuang3@nuvoton.com>,
	Shan-Chun Hung <schung@nuvoton.com>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] phy: nuvoton: Add MA35D1 USB2 OTG PHY driver
Date: Thu, 11 Jun 2026 16:34:40 +0530	[thread overview]
Message-ID: <aiqWSGCuhAK7hoY9@vaman> (raw)
In-Reply-To: <20260604101220.1092822-3-a0987203069@gmail.com>

On 04-06-26, 18:12, Joey Lu wrote:
> Add a PHY driver for the USB 2.0 PHYs in the Nuvoton MA35D1 SoC,
> intended for use with the EHCI and OHCI host controllers.
> 
> The MA35D1 SoC has two USB ports:
> 
>   - USB0: an OTG port shared between a DWC2 gadget controller and
>     EHCI0/OHCI0 host controllers.  A hardware mux automatically routes
>     the physical USB0 signals to the appropriate controller based on the
>     USB ID pin state.  The DWC2 IP is device-only in hardware,
>     so host-mode operation on USB0 is handled entirely by EHCI0/OHCI0.
> 
>   - USB1: a dedicated host-only port served by EHCI1/OHCI1.
> 
> The driver implements:
>   - Power-On Reset sequence with a guard that skips re-initialization if
>     the PHY is already operational.  This protects PHY0 when the DWC2
>     gadget driver has already run its own init before EHCI0 probes.
>   - Optional resistor calibration trim via nuvoton,rcalcode.
>   - Optional over-current detect polarity via nuvoton,oc-active-high.
>   - For PHY0 only: a USB role switch that exposes the hardware ID pin
>     state (PWRONOTP[16]).
> 
> Signed-off-by: Joey Lu <a0987203069@gmail.com>
> ---
>  drivers/phy/nuvoton/Kconfig          |  15 ++
>  drivers/phy/nuvoton/Makefile         |   1 +
>  drivers/phy/nuvoton/phy-ma35d1-otg.c | 264 +++++++++++++++++++++++++++
>  3 files changed, 280 insertions(+)
>  create mode 100644 drivers/phy/nuvoton/phy-ma35d1-otg.c
> 
> diff --git a/drivers/phy/nuvoton/Kconfig b/drivers/phy/nuvoton/Kconfig
> index d02cae2db315..5fdd13f841e7 100644
> --- a/drivers/phy/nuvoton/Kconfig
> +++ b/drivers/phy/nuvoton/Kconfig
> @@ -10,3 +10,18 @@ config PHY_MA35_USB
>  	help
>  	  Enable this to support the USB2.0 PHY on the Nuvoton MA35
>  	  series SoCs.
> +
> +config PHY_MA35_USB_OTG
> +	tristate "Nuvoton MA35 USB2.0 OTG PHY driver"
> +	depends on ARCH_MA35 || COMPILE_TEST
> +	depends on OF
> +	select GENERIC_PHY
> +	select MFD_SYSCON
> +	select USB_ROLE_SWITCH
> +	help
> +	  Enable this to support the USB2.0 OTG PHY on the Nuvoton MA35
> +	  series SoCs.  This driver handles PHY initialization for the
> +	  EHCI/OHCI host controllers, including per-PHY power-on reset,
> +	  resistor calibration trim, and over-current polarity
> +	  configuration.  For the OTG port (PHY0), it also monitors the
> +	  USB ID pin and registers a USB role switch.
> diff --git a/drivers/phy/nuvoton/Makefile b/drivers/phy/nuvoton/Makefile
> index 2937e3921898..3ecd76f35d7c 100644
> --- a/drivers/phy/nuvoton/Makefile
> +++ b/drivers/phy/nuvoton/Makefile
> @@ -1,3 +1,4 @@
>  # SPDX-License-Identifier: GPL-2.0
>  
>  obj-$(CONFIG_PHY_MA35_USB)		+= phy-ma35d1-usb2.o
> +obj-$(CONFIG_PHY_MA35_USB_OTG)		+= phy-ma35d1-otg.o

Have you considered reusing usb2 driver with a different power_on
function? Or handle the differences internally in the driver. There are
few similarities in two and some things are different

-- 
~Vinod

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