From: Vinod Koul <vkoul@kernel.org>
To: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650
Date: Thu, 11 Jun 2026 16:45:02 +0530 [thread overview]
Message-ID: <aiqYtowP2DQt7Jw0@vaman> (raw)
In-Reply-To: <20260602-ipq9650_pcie_phy-v1-0-d8c32a36dbd9@oss.qualcomm.com>
On 02-06-26, 14:40, Kathiravan Thirumoorthy wrote:
> Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane
> controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC,
> refgen supply is needed to bringup the PHYs. Both single and dual lane
> shares the same HW init sequence. So reuse the tables.
>
> Document the compatible along with refgen supply and add the phy driver
> support for it.
Please rebase this on phy-next tomorrow. It does not apply for me due to
changes applied ealier today
--
~Vinod
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next prev parent reply other threads:[~2026-06-11 11:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 9:10 [PATCH 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650 Kathiravan Thirumoorthy
2026-06-02 9:10 ` [PATCH 1/2] dt-bindings: phy: qcom,ipq8074-qmp-pcie: document IPQ9650 QMP PCIe PHYs Kathiravan Thirumoorthy
2026-06-08 10:12 ` Krzysztof Kozlowski
2026-06-02 9:10 ` [PATCH 2/2] phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support Kathiravan Thirumoorthy
2026-06-08 6:56 ` Dmitry Baryshkov
2026-06-09 10:16 ` Kathiravan Thirumoorthy
2026-06-11 11:15 ` Vinod Koul [this message]
2026-06-11 16:22 ` [PATCH 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650 Kathiravan Thirumoorthy
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