From: Matthew Leung <matthew.leung@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: Re: [PATCH v2 00/10] phy: qcom: qmp-pcie: Add PCIe PHY support for Hawi
Date: Thu, 11 Jun 2026 17:39:34 -0700 [thread overview]
Message-ID: <aitVRtzigfZg6Me8@hu-mattleun-lv.qualcomm.com> (raw)
In-Reply-To: <egojnbup5igcre6ccegojsdrvtokwfoccqhwmfxkoy5ukvuxvj@ailtbrgrgocs>
On Mon, Jun 08, 2026 at 12:25:03AM +0300, Dmitry Baryshkov wrote:
> On Thu, Jun 04, 2026 at 01:32:54AM +0000, Matthew Leung wrote:
> > This series adds QMP PCIe PHY support for the Qualcomm Hawi SoC. The Hawi
> > platform features two PCIe PHY configurations: Gen3 x2 and Gen4 x1.
> >
> > The Gen3 x2 PHY uses v10 register definitions, while the Gen4 x1 PHY uses
> > v10.60 register definitions.
> >
> > The series adds:
> > - device tree bindings (patch 1)
> > - v10 register offset headers (patches 2-5)
> > - v10.60 register offset headers (patches 6-9)
> > - driver support with PHY initialization tables for both configurations
> > (patch 10)
> >
> > Overlap:
> > The series has overlap with "phy: qcom: Introduce USB support for Hawi"
> > by Ronak Raheja (see link [1]). Both patch series introduce a subset of
> > v10 registers (this series for PCIe and Ronak's for USB). I have
> > coordinated with Ronak regarding the overlap, and we can update the
> > series to resolve any overlap based on the order of merging.
> >
> > Link: https://lore.kernel.org/all/20260508213234.4643-1-ronak.raheja@oss.qualcomm.com/ [1]
> >
> > Signed-off-by: Matthew Leung <matthew.leung@oss.qualcomm.com>
> > ---
> > Changes in v2:
> > - Rebased onto v7.1-rc6
> > - Patch 1: no change (Reviewed-by carried forward)
> > - Patch 9: rename QPHY_PCIE_V10_60_PCS_PCS_TX_RX_CONFIG to
> > QPHY_PCIE_V10_60_PCS_TX_RX_CONFIG to be consistent with the
> > naming convention used in previous pcs-pcie headers
> > - Patch 10: update usage of renamed macro
> > - Link to v1: https://patch.msgid.link/20260508-hawi-phy-pcie-v1-0-237b894353fc@oss.qualcomm.com
> >
> > To: Vinod Koul <vkoul@kernel.org>
> > To: Neil Armstrong <neil.armstrong@linaro.org>
> > To: Rob Herring <robh@kernel.org>
> > To: Krzysztof Kozlowski <krzk+dt@kernel.org>
> > To: Conor Dooley <conor+dt@kernel.org>
> > Cc: linux-arm-msm@vger.kernel.org
> > Cc: linux-phy@lists.infradead.org
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> >
> > ---
> > Matthew Leung (10):
> > dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Hawi compatibles
> > phy: qcom-qmp: qserdes-com: Add v10 register offsets
> > phy: qcom-qmp: qserdes-txrx: Add v10 register offsets
> > phy: qcom-qmp: pcs: Add v10 register offsets
> > phy: qcom-qmp: pcs-pcie: Add v10 register offsets
>
> Squash these 4 patches.
>
> > phy: qcom-qmp: qserdes-com: Add v10.60 register offsets
> > phy: qcom-qmp: qserdes-txrx: Add v10.60 register offsets
> > phy: qcom-qmp: pcs: Add v10.60 register offsets
> > phy: qcom-qmp: pcs-pcie: Add v10.60 register offsets
>
> And these 4
Will do.
>
> > phy: qcom: qmp-pcie: Add QMP PCIe PHY support for Hawi
> >
> > .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 6 +
> > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 382 +++++++++++++++++++++
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v10.h | 18 +
> > .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v10_60.h | 26 ++
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10.h | 22 ++
> > drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10_60.h | 23 ++
> > .../phy/qualcomm/phy-qcom-qmp-qserdes-com-v10.h | 49 +++
> > .../phy/qualcomm/phy-qcom-qmp-qserdes-com-v10_60.h | 55 +++
> > .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v10.h | 47 +++
> > .../qualcomm/phy-qcom-qmp-qserdes-txrx-v10_60.h | 109 ++++++
> > drivers/phy/qualcomm/phy-qcom-qmp.h | 10 +
> > 11 files changed, 747 insertions(+)
> > ---
> > base-commit: e43ffb69e0438cddd72aaa30898b4dc446f664f8
> > change-id: 20260506-hawi-phy-pcie-283933b4113e
> >
> > Best regards,
> > --
> > Matthew Leung <matthew.leung@oss.qualcomm.com>
> >
> >
> > --
> > linux-phy mailing list
> > linux-phy@lists.infradead.org
> > https://lists.infradead.org/mailman/listinfo/linux-phy
>
> --
> With best wishes
> Dmitry
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
prev parent reply other threads:[~2026-06-12 0:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-04 1:32 [PATCH v2 00/10] phy: qcom: qmp-pcie: Add PCIe PHY support for Hawi Matthew Leung
2026-06-04 1:32 ` [PATCH v2 01/10] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Hawi compatibles Matthew Leung
2026-06-04 1:32 ` [PATCH v2 02/10] phy: qcom-qmp: qserdes-com: Add v10 register offsets Matthew Leung
2026-06-04 1:32 ` [PATCH v2 03/10] phy: qcom-qmp: qserdes-txrx: " Matthew Leung
2026-06-04 1:32 ` [PATCH v2 04/10] phy: qcom-qmp: pcs: " Matthew Leung
2026-06-04 1:32 ` [PATCH v2 05/10] phy: qcom-qmp: pcs-pcie: " Matthew Leung
2026-06-04 1:33 ` [PATCH v2 06/10] phy: qcom-qmp: qserdes-com: Add v10.60 " Matthew Leung
2026-06-04 1:33 ` [PATCH v2 07/10] phy: qcom-qmp: qserdes-txrx: " Matthew Leung
2026-06-04 1:33 ` [PATCH v2 08/10] phy: qcom-qmp: pcs: " Matthew Leung
2026-06-04 1:33 ` [PATCH v2 09/10] phy: qcom-qmp: pcs-pcie: " Matthew Leung
2026-06-04 1:33 ` [PATCH v2 10/10] phy: qcom: qmp-pcie: Add QMP PCIe PHY support for Hawi Matthew Leung
2026-06-07 21:29 ` Dmitry Baryshkov
2026-06-12 0:37 ` Matthew Leung
2026-06-07 21:25 ` [PATCH v2 00/10] phy: qcom: qmp-pcie: Add " Dmitry Baryshkov
2026-06-12 0:39 ` Matthew Leung [this message]
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