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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33bfb05e604sm9699019eec.12.2026.09.16.18.36.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Sep 2026 18:36:17 -0700 (PDT) Date: Thu, 17 Sep 2026 09:36:08 +0800 From: Shawn Guo To: Nabige Aala Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P Subject: Re: [PATCH 03/17] dt-bindings: display/msm: Document Nord MDSS Message-ID: References: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com> <20260911-nord-drv-dt-v1-3-e25c073cf1b6@oss.qualcomm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260911-nord-drv-dt-v1-3-e25c073cf1b6@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: S22lLf7LI-KwvmycJcJkt5SSOpIU3UgZ X-Proofpoint-GUID: S22lLf7LI-KwvmycJcJkt5SSOpIU3UgZ X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDAxOSBTYWx0ZWRfX1CjzpyfiTDWQ LaQYQWy8TGPF5VJV2joI6q/zJ0B3QfVyb0iFlBh9jnVNlQjavY4CqKVQCq521yY5KhcG9wC63ea qp5Vrm7c6EC8/PW6VgD5GzSc7C9n49I= X-Authority-Analysis: v=2.4 cv=I9fw19gg c=1 sm=1 tr=0 ts=6aab4413 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=gEfo2CItAAAA:8 a=JfrnYn6hAAAA:8 a=EUspDBNiAAAA:8 a=-8PEYfhsPDB8XfM_kOAA:9 a=CjuIK1q_8ugA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=sptkURWiP4Gy88Gu7hUp:22 a=1CNFftbPRP8L7MoqJWF3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE3MDAxOSBTYWx0ZWRfXw+crO6smamH+ OI3bNtVIVKumWqj4UkAQft9rKeKK/SDGdMGih8E3G5VDodQtSNC3aNC1m7FJCwTLOquPlRox7Pw 2PmJv9+E/+ttvV6cV5cUv4KThIkP8XJAHK/GgQxfwlJy1GLFZ+c2FijC4FqQm5GOCMFvNpNYTmH ZZ89Rmtl6Pe2nTG+Qzmbt0sULC49g0AbxaHTg6QvQKd7eE5FhRPV+BDReh03k/fkNrYAQzKVZ/u cFs0dcPG+3/BNzQgn1Nj3LQRK2v1zl0vKcEQmYL0NDXL0nr156zeMZSNJkXQfWmtR18QctQUGmD PmFo+NKIdi4NMOuqCf76Ir4olixoqj3kgZjFWJjwOTlhEUa4+aFQE1mk+J4DUJodimd6wBlpmxi nG/XLCXJh1W5ZxLkVODWc7hRa3C8NF2NLC8rwfeNP3cCweyoIv3gIBtDkJvhuCxuXoMYD8VDpBc 7hwpBsE4d+eSQ+R164Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-16_03,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 clxscore=1015 bulkscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170019 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260916_183620_779390_FEA4FD29 X-CRM114-Status: GOOD ( 22.96 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Fri, Sep 11, 2026 at 09:06:34PM +0530, Nabige Aala wrote: > From: Mahadevan P > > Add the binding for the display subsystem (MDSS) found on the Qualcomm > Nord SoC. Nord is MDSS 12.1, DP-only (no DSI), with two independent DP > controllers. > > Signed-off-by: Mahadevan P > Signed-off-by: Nabige Aala > --- > .../bindings/display/msm/qcom,nord-mdss.yaml | 98 ++++++++++++++++++++++ > 1 file changed, 98 insertions(+) > > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml > new file mode 100644 > index 000000000000..0b0cacdca9db > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml > @@ -0,0 +1,98 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/qcom,nord-mdss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Nord display subsystem (MDSS) > + > +maintainers: > + - Mahadevan P > + > +description: > + Nord display subsystem consists of MDSS (display controller), DPU 1499A > + (display processing unit), and display interface controllers (DP only, no DSI). > + This is MDSS 12.1, DP-only, with 2 independent DP controllers. > + > +$ref: /schemas/display/msm/mdss-common.yaml# > + > +properties: > + compatible: > + const: qcom,nord-mdss > + > + clocks: > + items: > + - description: Display AHB > + - description: Display hf AXI > + - description: Display core > + > + clock-names: > + items: > + - const: iface > + - const: bus > + - const: core > + > + iommus: > + maxItems: 1 The DTS in downstream repository doesn't seem to agree. There is two items for iommus. > + > + interconnects: > + items: > + - description: Interconnect path from mdp0 port to the data bus > + - description: Interconnect path from CPU to the reg bus > + > + interconnect-names: > + items: > + - const: mdp0-mem > + - const: cpu-cfg > + > +patternProperties: > + "^display-controller@[0-9a-f]+$": > + type: object > + additionalProperties: true > + properties: > + compatible: > + const: qcom,nord-dpu > + > + "^displayport-controller@[0-9a-f]+$": > + type: object > + additionalProperties: true > + properties: > + compatible: > + const: qcom,nord-dp > + > + "^phy@[0-9a-f]+$": > + type: object > + additionalProperties: true > + properties: > + compatible: > + const: qcom,nord-dp-phy > + > +required: > + - compatible > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include Please run dt_binding_check against mainline kernel where the header is actually qcom,nord-dispcc.h. Shawn > + #include > + #include > + > + display-subsystem@ae00000 { > + compatible = "qcom,nord-mdss"; > + reg = <0x0ae00000 0x1000>; > + reg-names = "mdss"; > + power-domains = <&dispcc_gdsc>; > + clocks = <&dispcc DISPCC_MDSS_AHB_CLK>, > + <&gcc GCC_DISP_HF_AXI_CLK>, > + <&dispcc DISPCC_MDSS_MDP_CLK>; > + clock-names = "iface", "bus", "core"; > + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; > + interrupts = ; > + interrupt-controller; > + #interrupt-cells = <1>; > + iommus = <&apps_smmu 0x800 0x420>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + }; > > -- > 2.34.1 > > > -- > linux-phy mailing list > linux-phy@lists.infradead.org > https://lists.infradead.org/mailman/listinfo/linux-phy -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy