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Thu, 02 Jun 2022 04:49:01 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 2 Jun 2022 04:38:59 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 2 Jun 2022 19:38:57 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 2 Jun 2022 19:38:57 +0800 Message-ID: Subject: Re: [PATCH v10 11/21] drm/mediatek: dpi: move swap_shift to SoC config From: Rex-BC Chen To: CK Hu , Guillaume Ranquet , Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Matthias Brugger , Chunfeng Yun , "Kishon Vijay Abraham I" , Vinod Koul , "Helge Deller" , Jitao shi CC: AngeloGioacchino Del Regno , , , , , , , Date: Thu, 2 Jun 2022 19:38:57 +0800 In-Reply-To: <76ddd49bb2bb46923900b085056ce22d7bfa0b0a.camel@mediatek.com> References: <20220523104758.29531-1-granquet@baylibre.com> <20220523104758.29531-12-granquet@baylibre.com> <76ddd49bb2bb46923900b085056ce22d7bfa0b0a.camel@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220602_044904_396501_2DC10D8A X-CRM114-Status: GOOD ( 23.38 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Mon, 2022-05-30 at 16:38 +0800, CK Hu wrote: > Hi, Guillaume: > > On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote: > > Add flexibility by moving the swap shift value to SoC specific > > config > > > > Signed-off-by: Guillaume Ranquet > > Reviewed-by: Rex-BC Chen > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > > b/drivers/gpu/drm/mediatek/mtk_dpi.c > > index 6eeda222a973..6d4d8c6ec47d 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > > @@ -131,6 +131,7 @@ struct mtk_dpi_conf { > > u32 dimension_mask; > > /* HSIZE and VSIZE mask (no shift) */ > > u32 hvsize_mask; > > + u32 channel_swap_shift; > > const struct mtk_dpi_yc_limit *limit; > > }; > > > > @@ -349,7 +350,8 @@ static void mtk_dpi_config_channel_swap(struct > > mtk_dpi *dpi, > > break; > > } > > > > - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, > > CH_SWAP_MASK); > > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << dpi->conf- > > > channel_swap_shift, > > > > + CH_SWAP_MASK); > > From the definiton: > > #define CH_SWAP 0 > +#define DPINTF_CH_SWAP BIT(1) > #define CH_SWAP_MASK (0x7 << 0) > +#define DPINTF_CH_SWAP_MASK (0x7 << 1) > > This statement should be: > > mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << dpi->conf- > > channel_swap_shift, CH_SWAP_MASK << dpi->conf->channel_swap_shift); > > dpi->conf->channel_swap_shift is 1 for MT8195-DP_INTF and 0 for > others. > And drop the definition of DPINTF_CH_SWAP and DPINTF_CH_SWAP_MASK, > > Regards, > CK > Hello CK, I think we should keep DPINTF_CH_SWAP? BIT(1) = 2 so the shift should be: dpi->conf->channel_swap_shift is 2 for MT8195-DP_INTF and 0 for others. BRs, Bo-Chen > > > } > > > > static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool > > enable) > > @@ -821,6 +823,7 @@ static const struct mtk_dpi_conf mt8173_conf = > > { > > .swap_input_support = true, > > .dimension_mask = HPW_MASK, > > .hvsize_mask = HSIZE_MASK, > > + .channel_swap_shift = CH_SWAP, > > .limit = &mtk_dpi_limit, > > }; > > > > @@ -835,6 +838,7 @@ static const struct mtk_dpi_conf mt2701_conf = > > { > > .swap_input_support = true, > > .dimension_mask = HPW_MASK, > > .hvsize_mask = HSIZE_MASK, > > + .channel_swap_shift = CH_SWAP, > > .limit = &mtk_dpi_limit, > > }; > > > > @@ -848,6 +852,7 @@ static const struct mtk_dpi_conf mt8183_conf = > > { > > .swap_input_support = true, > > .dimension_mask = HPW_MASK, > > .hvsize_mask = HSIZE_MASK, > > + .channel_swap_shift = CH_SWAP, > > .limit = &mtk_dpi_limit, > > }; > > > > @@ -861,6 +866,7 @@ static const struct mtk_dpi_conf mt8192_conf = > > { > > .swap_input_support = true, > > .dimension_mask = HPW_MASK, > > .hvsize_mask = HSIZE_MASK, > > + .channel_swap_shift = CH_SWAP, > > .limit = &mtk_dpi_limit, > > }; > > > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy