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Wed, 30 Sep 2026 11:46:09 -0700 (PDT) Received: from strix.localnet ([197.250.96.176]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b06a360c2sm858825f8f.36.2026.09.30.11.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 11:46:08 -0700 (PDT) From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: linux-clk@vger.kernel.org Cc: Brian Masney , Conor Dooley , devicetree@vger.kernel.org, Jerome Brunet , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Manivannan Sadhasivam , Neil Armstrong , Philipp Zabel , Rob Herring , Stephen Boyd , Vinod Koul , mturquette@baylibre.com Subject: Re: [GIT PULL] clk: zte: zx297520v3 clock bindings and driver Date: Wed, 30 Sep 2026 21:45:58 +0300 Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260930_194611_908131_FF5BA512 X-CRM114-Status: GOOD ( 14.11 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============5128973259927968278==" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org --===============5128973259927968278== Content-Type: multipart/signed; boundary="nextPartsPKDCllISYmd3lCo26IFKw"; micalg="pgp-sha256"; protocol="application/pgp-signature" --nextPartsPKDCllISYmd3lCo26IFKw Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8"; protected-headers="v1" From: Stefan =?UTF-8?B?RMO2c2luZ2Vy?= To: linux-clk@vger.kernel.org Subject: Re: [GIT PULL] clk: zte: zx297520v3 clock bindings and driver Date: Wed, 30 Sep 2026 21:45:58 +0300 Message-ID: In-Reply-To: References: MIME-Version: 1.0 Am Mittwoch, 30. September 2026, 21:40:12 Ostafrikanische Zeit schrieb Stef= an=20 D=C3=B6singer: > Hi, >=20 > This pull request contains the device tree bindings and clock driver for = ZTE > zx297520v3 boards. It contains the next step in adding support for > zx297520v3 boards: Documenting clock and reset manager hardware and adding > drivers for its PLLs and clock tree. >=20 > The patches have been reviewed and carry appropriate R-B tags by Krzysztof > Kozlowski (bindings) and Conor Dooley (clk driver). My apologies for the name confusion: The clk part has been reviewed by Bria= n=20 Masney of course, not Conor Dooley. Best regards, Stefan --nextPartsPKDCllISYmd3lCo26IFKw Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part. 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