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charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Hi Neil, On 11/10/2023 4:47 PM, neil.armstrong@linaro.org wrote: > Hi, > > On 07/11/2023 05:46, Can Guo wrote: >> From: Can Guo >> >> On SM8550, two sets of UFS PHY settings are provided, one set is to >> support >> HS-G5, another set is to support HS-G4 and lower gears. The two sets >> of PHY >> settings are programming different values to different registers, mixing >> the two sets and/or overwriting one set with another set is definitely >> not >> blessed by UFS PHY designers. In order to add HS-G5 support for >> SM8550, we >> need to split the two sets into their dedicated tables, and leave only >> the >> common settings in the .tlbs. To have the PHY programmed with the correct >> set of PHY settings, the submode passed to PHY driver must be either >> HS-G4 >> or HS-G5. > > I guess I'll need to rebase my SM8650 UFS PHY driver to support both G4 > and G5 modes > at some point ? Thank for reaching out. Yes, please. I can help review the PHY settings. BTW, are you enabling MCQ (by adding MCQ related DT) at the same time? Thanks, Can Guo. > > Neil > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy