Re: [PATCH v3 2/3] arm64: dts: qcom: qcs615: add UFS node

Xin Liu
2024-12-09T07:57:44Z

在 2024/12/6 5:21, Konrad Dybcio 写道:
> On 22.11.2024 7:44 AM, Xin Liu wrote:
>> From: Sayali Lokhande <quic_sayalil@quicinc.com>
>>
>> Add the UFS Host Controller node and its PHY for QCS615 SoC.
>>
>> Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
>> Co-developed-by: Xin Liu <quic_liuxin@quicinc.com>
>> Signed-off-by: Xin Liu <quic_liuxin@quicinc.com>
>> ---
>
> [...]
>
>> +
>> + operating-points-v2 = <&ufs_opp_table>;
>> + interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
>> + &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>;
>
> QCOM_ICC_TAG_ACTIVE_ONLY for the cpu path
I need to ask you for advice. I have reviewed the ufs_mem_hc of many
devices and found that all of them use QCOM_ICC_TAG_ALWAYS for their
interconnects cpu path. Why do I need to use QCOM_ICC_TAG_ACTIVE_ONLY here?
>
>> + interconnect-names = "ufs-ddr",
>> + "cpu-ufs";
>> +
>> + power-domains = <&gcc UFS_PHY_GDSC>;
>> + required-opps = <&rpmhpd_opp_nom>;
>
> this contradicts the levels in the OPP table:
The required-opps here corresponds to opp-200000000 in the opp_table
below. Similarly, I referred to sm8550.dtsi, whose required-opps also
corresponds to the opp table.
>
>> +
>> + iommus = <&apps_smmu 0x300 0x0>;
>> + dma-coherent;
>> +
>> + lanes-per-direction = <1>;
>> +
>> + phys = <&ufs_mem_phy>;
>> + phy-names = "ufsphy";
>> +
>> + #reset-cells = <1>;
>> +
>> + status = "disabled";
>> +
>> + ufs_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-50000000 {
>> + opp-hz = /bits/ 64 <50000000>,
>> + /bits/ 64 <0>,
>> + /bits/ 64 <0>,
>> + /bits/ 64 <37500000>,
>> + /bits/ 64 <75000000>,
>> + /bits/ 64 <0>,
>> + /bits/ 64 <0>,
>> + /bits/ 64 <0>;
>> + required-opps = <&rpmhpd_opp_low_svs>;
>> + };
>> +
>
> Konrad