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21:03:29 +1200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API transition cleanups To: Cristian Ciocaltea , Vinod Koul , Neil Armstrong , Heiko Stuebner , Algea Cao , Dmitry Baryshkov Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com> Content-Language: en-US From: Simon Wright In-Reply-To: <20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com> X-ClientProxiedBy: DSSP221CA0008.NAMP221.PROD.OUTLOOK.COM (2603:10b6:8:3d5::14) To ME3P282MB2196.AUSP282.PROD.OUTLOOK.COM (2603:10c6:220:b2::11) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ME3P282MB2196:EE_|ME3P282MB1090:EE_ X-MS-Office365-Filtering-Correlation-Id: a0186295-9a19-4c37-7159-08deace0b23e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 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link 'reaver_cache/prob_good/20260227_124856_768935_57D7D58A': File exists X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260227_124856_768935_57D7D58A X-CRM114-Status: GOOD ( 21.16 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Tested on R76S (RK3576) + LG G3 OLED at 1920x1080@60 bpc=10 (tmds_char_rate = 185625000): phy_configure / phy_power_on / atomic_enable consistent end-to-end, no rate recalculation drift. Matches the cover letter behaviour. Heiko, Vinod -- any chance the series can be applied? Tested-by: Simon Wright Regards, Simon Symple Solutions, Dunedin, New Zealand On 28/02/2026 9:48 am, Cristian Ciocaltea wrote: > This series provides a set of bug fixes and cleanups for the Rockchip > Samsung HDPTX PHY driver. > > The first part of the series (i.e. PATCH 1 & 2) addresses clock rate > calculation and synchronization issues. Specifically, it fixes edge > cases where the PHY PLL is pre-programmed by an external component (like > a bootloader) or when changing the color depth (bpc) while keeping the > modeline constant. Because the Common Clock Framework .set_rate() > callback might not be invoked if the pixel clock remains unchanged, this > previously led to out-of-sync states between CCF and the actual HDMI PHY > configuration. > > The second part focuses on code cleanups and modernizing the register > access. Now that dw_hdmi_qp driver has fully switched to using > phy_configure(), we can drop the deprecated TMDS rate setup workarounds > and the restrict_rate_change flag logic. Finally, it refactors the > driver to consistently use standard bitfield macros. > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (6): > phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc > phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes > phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround > phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling > phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() > phy: rockchip: samsung-hdptx: Consistently use bitfield macros > > drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 215 +++++++++------------- > 1 file changed, 92 insertions(+), 123 deletions(-) > --- > base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f > change-id: 20260227-hdptx-clk-fixes-47426632f862 > > > From mboxrd@z Thu Jan 1 00:00:00 1970 > Return-Path: > X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on > aws-us-west-2-korg-lkml-1.web.codeaurora.org > Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) > (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) > (No client certificate requested) > by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EFFEFEFB51 > for ; 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> Fri, 27 Feb 2026 21:48:51 +0100 (CET) > From: Cristian Ciocaltea > Subject: [PATCH 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API > transition cleanups > Date: Fri, 27 Feb 2026 22:48:44 +0200 > Message-Id: <20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com> > MIME-Version: 1.0 > X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x3LQQqAIBBA0avErBuoSTS6SrSIGmsoTDRCCO+et > Hx8/guRg3CEoXoh8CNRLlfQ1hUs++w2RlmLgRrSDZHBffV3wuU80EriiMoo0roj22uCcvnAfyj > TOOX8AXle+u9hAAAA > X-Change-ID: 20260227-hdptx-clk-fixes-47426632f862 > To: Vinod Koul , > Neil Armstrong , > Heiko Stuebner , Algea Cao , > Dmitry Baryshkov > Cc: kernel@collabora.com, linux-phy@lists.infradead.org, > linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, > linux-kernel@vger.kernel.org > X-Mailer: b4 0.14.3 > X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 > X-CRM114-CacheID: sfid-20260227_124856_768935_57D7D58A > X-CRM114-Status: UNSURE ( 7.77 ) > X-CRM114-Notice: Please train this message. > X-BeenThere: linux-rockchip@lists.infradead.org > X-Mailman-Version: 2.1.34 > Precedence: list > List-Id: Upstream kernel work for Rockchip platforms > List-Unsubscribe: , > > List-Archive: > List-Post: > List-Help: > List-Subscribe: , > > Content-Type: text/plain; charset="us-ascii" > Content-Transfer-Encoding: 7bit > Sender: "Linux-rockchip" > Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org > > This series provides a set of bug fixes and cleanups for the Rockchip > Samsung HDPTX PHY driver. > > The first part of the series (i.e. PATCH 1 & 2) addresses clock rate > calculation and synchronization issues. Specifically, it fixes edge > cases where the PHY PLL is pre-programmed by an external component (like > a bootloader) or when changing the color depth (bpc) while keeping the > modeline constant. Because the Common Clock Framework .set_rate() > callback might not be invoked if the pixel clock remains unchanged, this > previously led to out-of-sync states between CCF and the actual HDMI PHY > configuration. > > The second part focuses on code cleanups and modernizing the register > access. Now that dw_hdmi_qp driver has fully switched to using > phy_configure(), we can drop the deprecated TMDS rate setup workarounds > and the restrict_rate_change flag logic. Finally, it refactors the > driver to consistently use standard bitfield macros. > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (6): > phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc > phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes > phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround > phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling > phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() > phy: rockchip: samsung-hdptx: Consistently use bitfield macros > > drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 215 +++++++++------------- > 1 file changed, 92 insertions(+), 123 deletions(-) > --- > base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f > change-id: 20260227-hdptx-clk-fixes-47426632f862 > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > > From mboxrd@z Thu Jan 1 00:00:00 1970 > Return-Path: > X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on > aws-us-west-2-korg-lkml-1.web.codeaurora.org > Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) > (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) > (No client certificate requested) > by smtp.lore.kernel.org (Postfix) with ESMTPS id CB9D410398AD > for ; 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> Fri, 27 Feb 2026 21:48:51 +0100 (CET) > From: Cristian Ciocaltea > Subject: [PATCH 0/6] phy: rockchip: samsung-hdptx: Clock fixes and API > transition cleanups > Date: Fri, 27 Feb 2026 22:48:44 +0200 > Message-Id: <20260227-hdptx-clk-fixes-v1-0-f998f2762d0f@collabora.com> > MIME-Version: 1.0 > X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x3LQQqAIBBA0avErBuoSTS6SrSIGmsoTDRCCO+et > Hx8/guRg3CEoXoh8CNRLlfQ1hUs++w2RlmLgRrSDZHBffV3wuU80EriiMoo0roj22uCcvnAfyj > TOOX8AXle+u9hAAAA > X-Change-ID: 20260227-hdptx-clk-fixes-47426632f862 > To: Vinod Koul , > Neil Armstrong , > Heiko Stuebner , Algea Cao , > Dmitry Baryshkov > Cc: kernel@collabora.com, linux-phy@lists.infradead.org, > linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, > linux-kernel@vger.kernel.org > X-Mailer: b4 0.14.3 > X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 > X-CRM114-CacheID: sfid-20260227_124856_768935_57D7D58A > X-CRM114-Status: UNSURE ( 7.77 ) > X-CRM114-Notice: Please train this message. > X-BeenThere: linux-phy@lists.infradead.org > X-Mailman-Version: 2.1.34 > Precedence: list > List-Id: Linux Phy Mailing list > List-Unsubscribe: , > > List-Archive: > List-Post: > List-Help: > List-Subscribe: , > > Content-Type: text/plain; charset="us-ascii" > Content-Transfer-Encoding: 7bit > Sender: "linux-phy" > Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org > > This series provides a set of bug fixes and cleanups for the Rockchip > Samsung HDPTX PHY driver. > > The first part of the series (i.e. PATCH 1 & 2) addresses clock rate > calculation and synchronization issues. Specifically, it fixes edge > cases where the PHY PLL is pre-programmed by an external component (like > a bootloader) or when changing the color depth (bpc) while keeping the > modeline constant. Because the Common Clock Framework .set_rate() > callback might not be invoked if the pixel clock remains unchanged, this > previously led to out-of-sync states between CCF and the actual HDMI PHY > configuration. > > The second part focuses on code cleanups and modernizing the register > access. Now that dw_hdmi_qp driver has fully switched to using > phy_configure(), we can drop the deprecated TMDS rate setup workarounds > and the restrict_rate_change flag logic. Finally, it refactors the > driver to consistently use standard bitfield macros. > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (6): > phy: rockchip: samsung-hdptx: Fix rate recalculation for high bpc > phy: rockchip: samsung-hdptx: Handle uncommitted PHY config changes > phy: rockchip: samsung-hdptx: Drop TMDS rate setup workaround > phy: rockchip: samsung-hdptx: Drop restrict_rate_change handling > phy: rockchip: samsung-hdptx: Simplify GRF access with FIELD_PREP_WM16() > phy: rockchip: samsung-hdptx: Consistently use bitfield macros > > drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 215 +++++++++------------- > 1 file changed, 92 insertions(+), 123 deletions(-) > --- > base-commit: 7d6661873f6b54c75195780a40d66bad3d482d8f > change-id: 20260227-hdptx-clk-fixes-47426632f862 > > -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy