Re: [PATCH 1/2] phy: qcom-qusb2: don't unrelated bits if autoresume is not used

From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Wesley Cheng <wesley.cheng@oss.qualcomm.com>
Cc: Vinod Koul <vkoul@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Kathiravan T <quic_kathirav@quicinc.com>,
	Baruch Siach <baruch@tkos.co.il>,
	Dmitry Baryshkov <lumag@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] phy: qcom-qusb2: don't unrelated bits if autoresume is not used
Date: Thu, 2 Jul 2026 19:13:29 +0530	[thread overview]
Message-ID: <e39c9092-30f3-4c04-8bdc-c6400871cecf@oss.qualcomm.com> (raw)
In-Reply-To: <3c533783-e2a5-48f3-8275-4cef5651938b@oss.qualcomm.com>

On 7/2/2026 5:54 PM, Konrad Dybcio wrote:
> On 7/2/26 2:21 PM, Dmitry Baryshkov wrote:
>> On Thu, Jul 02, 2026 at 02:00:06PM +0200, Konrad Dybcio wrote:
>>> On 7/2/26 1:40 PM, Dmitry Baryshkov wrote:
>>>> The IPQ6018 and QCS615 platforms don't need to toggle the autoresume
>>>> bit.
>>>
>>> why?
>>
>> Here I have no idea, the HPG is unspecific, exact details are to be
>> defined somewhere else. The platforms, when they were added, just stated
>> that autoresume is to be skipped. Maybe original developers (in cc) can
>> answer this question. Anyway, if autoresume is to be toggled, it should
>> be coming as a separate fixup. I can reorder the patches though, so that
>> at least register layout is correct.
> 
> +Krishna, Wesley?
> 
I checked downstream driver code and I see this:

1. If the phy is qusb2 v2, then we are setting and clearing BIT(0) of 
TEST1 register.
2. If the phy is qusb2, then we are setting and clearing BIT(3) of 
TEST_CTRL register.

For both IPQ6018 and QCS615, I checked and its BIT(3) of TEST_CTRL 
register to be set.

For msm8998 it is BIT(0) of TEST1 register.

Also for qcs615, in downstream code, I see that auto-resume is being 
set. Its a mistake from my end when I added [1].

[1]: 
https://lore.kernel.org/all/20241014084432.3310114-5-quic_kriskura@quicinc.com/

Regards,
Krishna,

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