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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-abba0ab1457sm974823066b.73.2025.02.21.11.55.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Feb 2025 11:55:48 -0800 (PST) Message-ID: Date: Fri, 21 Feb 2025 20:55:46 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] arm64: dts: qcom: sm8750: Add UFS nodes for SM8750 SoC To: Manivannan Sadhasivam , Konrad Dybcio Cc: Dmitry Baryshkov , Nitin Rawat , Melody Olvera , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Bjorn Andersson , Andy Gross , Konrad Dybcio , Satya Durga Srinivasu Prabhala , Trilok Soni , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, Manish Pandey References: <20250113-sm8750_ufs_master-v1-0-b3774120eb8c@quicinc.com> <20250113-sm8750_ufs_master-v1-4-b3774120eb8c@quicinc.com> <354f8710-a5ec-47b5-bcfa-bff75ac3ca71@oss.qualcomm.com> <20250214065009.w4rmrbbejnywh6nt@thinkpad> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250214065009.w4rmrbbejnywh6nt@thinkpad> X-Proofpoint-ORIG-GUID: FAis9iMQbkBkyOeZgh2uhWDTHCroO47d X-Proofpoint-GUID: FAis9iMQbkBkyOeZgh2uhWDTHCroO47d X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-21_07,2025-02-20_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502210137 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250221_115552_892819_81398E3F X-CRM114-Status: GOOD ( 24.50 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 14.02.2025 7:50 AM, Manivannan Sadhasivam wrote: > On Mon, Feb 10, 2025 at 08:20:27PM +0100, Konrad Dybcio wrote: >> On 8.02.2025 11:06 PM, Dmitry Baryshkov wrote: >>> On Sun, Feb 09, 2025 at 12:47:56AM +0530, Nitin Rawat wrote: >>>> >>>> >>>> On 1/14/2025 4:22 PM, Dmitry Baryshkov wrote: >>>>> On Mon, Jan 13, 2025 at 01:46:27PM -0800, Melody Olvera wrote: >>>>>> From: Nitin Rawat >>>>>> >>>>>> Add UFS host controller and PHY nodes for SM8750 SoC. >>>>>> >>>>>> Co-developed-by: Manish Pandey >>>>>> Signed-off-by: Manish Pandey >>>>>> Signed-off-by: Nitin Rawat >>>>>> Signed-off-by: Melody Olvera >>>>>> --- >> >> [...] >> >>>>> Use OPP table instead >>>> >>>> Currently, OPP is not enabled in the device tree for any previous targets. I >>> >>> Excuse me? ufs_opp_table is present on SM8250, SM8550 and SDM845 (and >>> QCS615). So this is not correct >>> >>>> plan to enable OPP in a separate patch at a later stage. This is because >>>> there is an ongoing patch in the upstream that aims to enable multiple-level >>>> clock scaling using OPP, which may introduce changes to the device tree >>>> entries. To avoid extra efforts, I intend to enable OPP once that patch is >>>> merged. >>> >>> Whatever changes are introduced, old DT must still continue to work. >>> There is no reason to use legacy freq-table-hz if you can use OPP table. >>> >>>> Please let me know if you have any concerns. >> >> Go ahead with the OPP table. freq-table-hz is ancient and doesn't describe >> e.g. the required RPMh levels for core clock frequencies. >> >> You should then drop required-opps from the UFS node. >> >>>>>> + >>>>>> + resets = <&gcc GCC_UFS_PHY_BCR>; >>>>>> + reset-names = "rst"; >>>>>> + >>>>>> + >>>>>> + interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS >>>>>> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, >>>>>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS >>>>>> + &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>; >>>>> >>>>> Shouldn't cpu-ufs be ACTIVE_ONLY? >>>> >>>> As per ufs driver implementation, Icc voting from ufs driver is removed as >>>> part of low power mode (suspend or clock gating) and voted again in >>>> resume/ungating path. Hence TAG_ALWAYS will have no power concern. >>>> All previous targets have the same configuration. >>> >>> arch/arm64/boot/dts/qcom/qcs615.dtsi: &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; >>> >>> It might be a mistake for that target though. Your explanation sounds >>> fine to me. >> >> Let's use QCOM_ICC_TAG_ACTIVE_ONLY for the CPU path to clear up confusion. >> >> Toggling it from the driver makes sense for UFS-idling-while-CPUs-are-online >> cases and accidentally also does what RPMh does internally in the other case. >> > > Shouldn't it be applied to config path of all peripherals then? If > QCOM_ICC_TAG_ACTIVE_ONLY translates to 'resource getting voted only if the CPUSS > is active', then the same constraint should apply to all peripherals, isn't it? Yes and lately we've been trying to catch that in review Konrad > I'm not sure who is accessing the config path other than the CPUs. >>hopefully<, no one Konrad -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy