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charset="us-ascii"; Format="flowed" Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On 9/24/2024 10:43 PM, Johan Hovold wrote: > On Tue, Sep 24, 2024 at 03:14:44AM -0700, Qiang Yu wrote: >> Describe PCIe3 controller and PHY. Also add required system resources like >> regulators, clocks, interrupts and registers configuration for PCIe3. >> @@ -2907,6 +2907,208 @@ mmss_noc: interconnect@1780000 { >> #interconnect-cells = <2>; >> }; >> >> + pcie3: pcie@1bd0000 { >> + device_type = "pci"; >> + compatible = "qcom,pcie-x1e80100"; >> + interrupts = , >> + , >> + , >> + , >> + , >> + , >> + , >> + , >> + ; >> + interrupt-names = "msi0", >> + "msi1", >> + "msi2", >> + "msi3", >> + "msi4", >> + "msi5", >> + "msi6", >> + "msi7", >> + "global"; > This ninth "global" interrupt is not described by the bindings, which > would also need to be updated. What is it used for? As of now, the global interrupts is mainly used to get link up event so that the device driver can enumerate the PCIe endpoint devices without user intervention. You can refer to https://lore.kernel.org/linux-pci/20240828-pci-qcom-hotplug-v4-11-263a385fbbcb@linaro.org. I see this global interrupts has been documented in qcom,pcie-sm8450.yaml. Do I need to move it to qcom,pcie-common.yaml? Thanks, Qiang > > Johan -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy