* [PATCH 05/11] arm64: dts: renesas: r8a77960: Describe PCIe root ports
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
In-Reply-To: <20260101203938.159161-1-marek.vasut+renesas@mailbox.org>
Add nodes which describe the root ports in the PCIe controller DT nodes.
This can be used together with the pwrctrl driver to control clock and
power supply to a PCIe slot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
---
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index e03b1f7cbfd6f..e2cdaec4dc2df 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2619,6 +2619,16 @@ pciec0: pcie@fe000000 {
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec0_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
pciec1: pcie@ee800000 {
@@ -2648,6 +2658,16 @@ pciec1: pcie@ee800000 {
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec1_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
imr-lx4@fe860000 {
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* [PATCH 04/11] arm64: dts: renesas: r8a77951: Describe PCIe root ports
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
In-Reply-To: <20260101203938.159161-1-marek.vasut+renesas@mailbox.org>
Add nodes which describe the root ports in the PCIe controller DT nodes.
This can be used together with the pwrctrl driver to control clock and
power supply to a PCIe slot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
---
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 1ac24e614aa9d..466794eac4d3a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -2826,6 +2826,16 @@ pciec0: pcie@fe000000 {
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec0_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
pciec1: pcie@ee800000 {
@@ -2855,6 +2865,16 @@ pciec1: pcie@ee800000 {
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
+
+ /* PCIe bridge, Root Port */
+ pciec1_rp: pci@0,0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ compatible = "pciclass,0604";
+ device_type = "pci";
+ ranges;
+ };
};
pciec0_ep: pcie-ep@fe000000 {
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* [PATCH 03/11] arm64: dts: renesas: ebisu: Enable USB 3.0 PHY
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
In-Reply-To: <20260101203938.159161-1-marek.vasut+renesas@mailbox.org>
Enable and configure the USB 3.0 PHY and its matching USB3S0 input
clock on R8A77990 E3 Ebisu board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
---
arch/arm64/boot/dts/renesas/ebisu.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/ebisu.dtsi b/arch/arm64/boot/dts/renesas/ebisu.dtsi
index adc4449b809ad..0b1ada18a4f74 100644
--- a/arch/arm64/boot/dts/renesas/ebisu.dtsi
+++ b/arch/arm64/boot/dts/renesas/ebisu.dtsi
@@ -871,7 +871,17 @@ &usb2_phy0 {
status = "okay";
};
+&usb3_phy0 {
+ status = "okay";
+};
+
+&usb3s0_clk {
+ clock-frequency = <100000000>;
+};
+
&usb3_peri0 {
+ phys = <&usb3_phy0>;
+ phy-names = "usb";
companion = <&xhci0>;
status = "okay";
};
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* [PATCH 02/11] arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
In-Reply-To: <20260101203938.159161-1-marek.vasut+renesas@mailbox.org>
This patch adds USB 3.0 PHY node for R8877990 E3 . The PHY node is
slightly different in that it does not have extal clock, which are
not routed to the SoC pads on E3. Add USB3S0 clock pad fixed-clock
node, the frequency has to be overridden at board level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 97a7cf675efa7..9b4569782d61d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -763,6 +763,18 @@ usb_dmac1: dma-controller@e65b0000 {
dma-channels = <2>;
};
+ usb3_phy0: usb-phy@e65ee000 {
+ compatible = "renesas,r8a77990-usb3-phy",
+ "renesas,rcar-gen3-usb3-phy";
+ reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>;
+ clock-names = "usb3-if", "usb3s_clk";
+ power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
arm_cc630p: crypto@e6601000 {
compatible = "arm,cryptocell-630p-ree";
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
@@ -2197,4 +2209,11 @@ timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
};
+
+ /* External USB clocks - can be overridden by the board */
+ usb3s0_clk: usb3s0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
};
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* [PATCH 00/11] Describe PCIe/USB3.0 clock generator on R-Car Gen3
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
Describe the 9FGV0841 PCIe and USB3.0 clock generator present on various
R-Car Gen3 boards. The clock generator supplies 100 MHz differential clock
for PCIe ports, USB 3.0 PHY and SATA.
The series effectively has three parts, the first three patches are part 1,
which fills in the missing USB 3.0 PHY on R-Car E3 Ebisu and enables it,
thus aligning the Ebisu USB 3.0 support with the rest of the Gen3 boards.
The second part is description of PCIe root ports on R-Car Gen3 SoCs where
applicable, in this case that is H3/M3W/M3N/E3. The root port is used with
PCIe port power control to also control the PCIe port clock. This is needed
on Gen3 boards, because they often use separate clock output from the PCIe
clock generator 9FGV0841 to supply clock to the controller and to the PCIe
port.
The third part is enablement of the 9FGV0841 PCIe clock controller on the
R-Car Salvator-X/XS, ULCB and Ebisu boards. The boards use the PCIe clock
controller outputs in a slightly different manner, all use the outputs to
supply PCIe controllers and slots, as well as USB 3.0 SuperSpeed PHY. The
ULCB board also uses the 9FGV0841 to supply SATA IP, but this is not yet
described in DT, therefore it is also not part of this series.
Marek Vasut (11):
dt-bindings: phy: renesas: usb3-phy: add r8a77990 support
arm64: dts: renesas: r8a77990: Add USB 3.0 PHY and USB3S0 clock nodes
arm64: dts: renesas: ebisu: Enable USB 3.0 PHY
arm64: dts: renesas: r8a77951: Describe PCIe root ports
arm64: dts: renesas: r8a77960: Describe PCIe root ports
arm64: dts: renesas: r8a77961: Describe PCIe root ports
arm64: dts: renesas: r8a77965: Describe PCIe root ports
arm64: dts: renesas: r8a77990: Describe PCIe root port
arm64: dts: renesas: salvator-common: Describe PCIe/USB3.0 clock
generator
arm64: dts: renesas: ulcb: ulcb-kf: Describe PCIe/USB3.0 clock
generator
arm64: dts: renesas: ebisu: Describe PCIe/USB3.0 clock generator
.../bindings/phy/renesas,usb3-phy.yaml | 1 +
arch/arm64/boot/dts/renesas/ebisu.dtsi | 43 +++++++++++++++++++
arch/arm64/boot/dts/renesas/r8a77951.dtsi | 20 +++++++++
arch/arm64/boot/dts/renesas/r8a77960.dtsi | 20 +++++++++
arch/arm64/boot/dts/renesas/r8a77961.dtsi | 20 +++++++++
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 20 +++++++++
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 29 +++++++++++++
.../boot/dts/renesas/salvator-common.dtsi | 26 +++++++++++
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 21 +++++++++
arch/arm64/boot/dts/renesas/ulcb.dtsi | 13 ++++++
10 files changed, 213 insertions(+)
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* [PATCH 01/11] dt-bindings: phy: renesas: usb3-phy: add r8a77990 support
From: Marek Vasut @ 2026-01-01 20:35 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Geert Uytterhoeven,
Krzysztof Kozlowski, Magnus Damm, Neil Armstrong, Rob Herring,
Vinod Koul, Yoshihiro Shimoda, devicetree, linux-phy,
linux-renesas-soc
In-Reply-To: <20260101203938.159161-1-marek.vasut+renesas@mailbox.org>
This patch adds support for r8a77990 (R-Car E3).
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: devicetree@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
---
Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml
index fe57c5373d18a..d0dd2d19b1ddb 100644
--- a/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml
@@ -20,6 +20,7 @@ properties:
- renesas,r8a7796-usb3-phy # R-Car M3-W
- renesas,r8a77961-usb3-phy # R-Car M3-W+
- renesas,r8a77965-usb3-phy # R-Car M3-N
+ - renesas,r8a77990-usb3-phy # R-Car E3
- const: renesas,rcar-gen3-usb3-phy
reg:
--
2.51.0
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* Re: [PATCH V2 3/4] arm64: dts: qcom: hamoa: Add UFS nodes for x1e80100 SoC
From: Abel Vesa @ 2026-01-01 19:03 UTC (permalink / raw)
To: Pradeep P V K
Cc: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, martin.petersen,
andersson, konradybcio, taniya.das, dmitry.baryshkov,
manivannan.sadhasivam, linux-arm-msm, linux-phy, devicetree,
linux-kernel, linux-scsi, nitin.rawat
In-Reply-To: <20251231101951.1026163-4-pradeep.pragallapati@oss.qualcomm.com>
On 25-12-31 15:49:50, Pradeep P V K wrote:
> Add UFS host controller and PHY nodes for x1e80100 SoC.
>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH v3 2/3] phy: qualcomm: phy-qcom-eusb2-repeater: Add squelch detect param update
From: Abel Vesa @ 2026-01-01 19:01 UTC (permalink / raw)
To: Krishna Kurapati
Cc: Neil Armstrong, Vinod Koul, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Konrad Dybcio, Abel Vesa,
Pengyu Luo, Johan Hovold, Luca Weiss, linux-arm-msm, linux-phy,
devicetree, linux-kernel
In-Reply-To: <20251219173108.2119296-3-krishna.kurapati@oss.qualcomm.com>
On 25-12-19 23:01:07, Krishna Kurapati wrote:
> Add support for overriding Squelch Detect parameter.
>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH RESEND v6 0/4] phy: qcom: edp: Add support for Glymur platform
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Abel Vesa
Cc: Dmitry Baryshkov, Konrad Dybcio, Neil Armstrong, linux-arm-msm,
linux-phy, devicetree, linux-kernel, Abel Vesa, Konrad Dybcio,
Dmitry Baryshkov
In-Reply-To: <20251224-phy-qcom-edp-add-glymur-support-v6-0-4fcba75a6fa9@oss.qualcomm.com>
On Wed, 24 Dec 2025 13:10:43 +0200, Abel Vesa wrote:
> The Glymur platform implements the eDP/DP PHY version 8.
> Add the necessary registers, rework the driver to accommodate
> this new version and add the Glymur specific configuration data.
>
> This patchset depends on:
> https://lore.kernel.org/r/20251224-phy-qcom-edp-add-missing-refclk-v5-0-3f45d349b5ac@oss.qualcomm.com/
>
> [...]
Applied, thanks!
[1/4] dt-bindings: phy: Add DP PHY compatible for Glymur
commit: 8f97b9b34f0d26339e8b0d26c2f466eeb188939b
[2/4] phy: qcom: edp: Fix the DP_PHY_AUX_CFG registers count
commit: 2d472a675ced00397440caed78168db5fdecf3a3
[3/4] phy: qcom-qmp: qserdes-com: Add v8 DP-specific qserdes register offsets
commit: 212cdedcac11c411d0e7c277e1cdcac5f1a20ba2
[4/4] phy: qcom: edp: Add Glymur platform support
commit: add66a6673bc4aacd0ef0f3c4a51271501770b17
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: (subset) [PATCH RESEND v5 0/3] phy: qcom: edp: Add missing ref clock to x1e80100
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Sibi Sankar, Rajendra Nayak, Abel Vesa
Cc: Neil Armstrong, linux-arm-msm, linux-phy, devicetree,
linux-kernel, Krzysztof Kozlowski, Krzysztof Kozlowski, Abel Vesa,
stable, Dmitry Baryshkov
In-Reply-To: <20251224-phy-qcom-edp-add-missing-refclk-v5-0-3f45d349b5ac@oss.qualcomm.com>
On Wed, 24 Dec 2025 12:53:26 +0200, Abel Vesa wrote:
> According to documentation, the DP PHY on x1e80100 has another clock
> called ref.
>
> The current X Elite devices supported upstream work fine without this
> clock, because the boot firmware leaves this clock enabled. But we should
> not rely on that. Also, when it comes to power management, this clock
> needs to be also disabled on suspend. So even though this change breaks
> the ABI, it is needed in order to make we disable this clock on runtime
> PM, when that is going to be enabled in the driver.
>
> [...]
Applied, thanks!
[1/3] dt-bindings: phy: qcom-edp: Add missing clock for X Elite
commit: 6b99eeacf6abb1ff2d6463c84e490343f39cf11a
[2/3] phy: qcom: edp: Make the number of clocks flexible
commit: 7d51b709262c5aa31d2b9cd31444112c1b2dae03
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH v3 0/2] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong, Abel Vesa
Cc: Wenbin Yao, linux-arm-msm, linux-phy, devicetree, linux-kernel,
Abel Vesa, Dmitry Baryshkov, Krzysztof Kozlowski
In-Reply-To: <20251224-phy-qcom-pcie-add-glymur-v3-0-57396145bc22@oss.qualcomm.com>
On Wed, 24 Dec 2025 12:35:00 +0200, Abel Vesa wrote:
> The Glymur platform comes with two PCIe Gen4 2-lanes controllers.
>
> Add support for their PHYs and document the compatible.
>
>
Applied, thanks!
[1/2] dt-bindings: phy: sc8280xp-qmp-pcie: Document Glymur PCIe Gen4 2-lanes PHY
commit: 25671c37821006392ff8c66e980475747bee4cde
[2/2] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY
commit: 085ba7c91df34e05366f9fecc9fa7a037598c30e
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH 1/3] phy: rockchip: usb: Simplify with scoped for each OF child loop
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Neil Armstrong, Geert Uytterhoeven, Magnus Damm, Heiko Stuebner,
linux-phy, linux-kernel, linux-renesas-soc, linux-arm-kernel,
linux-rockchip, Krzysztof Kozlowski
In-Reply-To: <20251224124407.208354-4-krzysztof.kozlowski@oss.qualcomm.com>
On Wed, 24 Dec 2025 13:44:08 +0100, Krzysztof Kozlowski wrote:
> Use scoped for-each loop when iterating over device nodes to make code a
> bit simpler.
>
>
Applied, thanks!
[1/3] phy: rockchip: usb: Simplify with scoped for each OF child loop
commit: 943dbe1470529d7191dccdb56ee0bff83d3606c5
[2/3] phy: core: Simplify with scoped for each OF child loop
commit: 175b46f31fe60d7772fae19f731f282327cb333f
[3/3] phy: renesas: rcar-gen2: Simplify with scoped for each OF child loop
commit: b64b32791fb557f922beebddf74c47baf338cef0
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH v6 0/2] Add USB2.0 PHY support for SpacemiT K1
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Yixun Lan, Ze Huang
Cc: linux-phy, devicetree, linux-riscv, spacemit, linux-kernel,
Ze Huang
In-Reply-To: <20251017-k1-usb2phy-v6-0-7cf9ea2477a1@linux.dev>
On Fri, 17 Oct 2025 22:49:51 +0800, Ze Huang wrote:
> This patch series introduces support for the USB2.0 PHY on the SpacemiT
> K1 SoC. The implementation has been tested on the Milk-V Jupiter and
> BananaPi-f3.
>
> K1 includes three USB ports as follows[1]:
> - A USB2.0 OTG Port
> - A USB2.0 Host Only Port
> - A USB3.0 Port with a USB2.0 DRD interface
>
> [...]
Applied, thanks!
[1/2] dt-bindings: phy: spacemit: add K1 USB2 PHY
commit: 61b84d5b20af2a4c9944972202c1386026598928
[2/2] phy: spacemit: support K1 USB2.0 PHY controller
commit: fe4bc1a08638309b6be1af37210930b856908eb7
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH] phy: renesas: phy-rcar-gen2: fix typo in function name reference
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Julia Lawall
Cc: yunbolyu, kexinsun, ratnadiraw, xutong.ma, Kishon Vijay Abraham I,
Geert Uytterhoeven, Magnus Damm, linux-phy, linux-renesas-soc,
linux-kernel
In-Reply-To: <20251230141050.93856-1-Julia.Lawall@inria.fr>
On Tue, 30 Dec 2025 15:10:50 +0100, Julia Lawall wrote:
> Replace cmpxcgh by cmpxchg.
>
>
Applied, thanks!
[1/1] phy: renesas: phy-rcar-gen2: fix typo in function name reference
commit: 5068c09db5c9ccd47f531bd3ff7f9fe50400fa13
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH] phy: adjust function name reference
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Daniel Golle, Julia Lawall
Cc: yunbolyu, kexinsun, ratnadiraw, xutong.ma, Qingfang Deng,
SkyLake Huang, Chunfeng Yun, Kishon Vijay Abraham I,
Matthias Brugger, AngeloGioacchino Del Regno, netdev,
linux-arm-kernel, linux-mediatek, linux-phy, linux-kernel
In-Reply-To: <20251230140601.93474-1-Julia.Lawall@inria.fr>
On Tue, 30 Dec 2025 15:06:01 +0100, Julia Lawall wrote:
> There is no function clk_bulk_prepare_disable. Refer instead to
> clk_bulk_disable_unprepare, which is called in the function
> defined just below.
>
>
Applied, thanks!
[1/1] phy: adjust function name reference
commit: 6c1cdea6bafea96a818181e1289e22fbdc09f1d3
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH] phy: core: Reinstate pm_runtime_enabled() check in phy_pm_runtime_put()
From: Vinod Koul @ 2026-01-01 11:08 UTC (permalink / raw)
To: Neil Armstrong, Rafael J . Wysocki, Geert Uytterhoeven
Cc: linux-phy, linux-renesas-soc, linux-kernel
In-Reply-To: <3ca9f8166d21685bfbf97535da30172f74822130.1767107014.git.geert+renesas@glider.be>
On Tue, 30 Dec 2025 16:04:05 +0100, Geert Uytterhoeven wrote:
> On Koelsch (R-Car M2-W), during boot and s2ram:
>
> phy phy-e6590100.usb-phy-controller.0: Runtime PM usage count underflow!
>
> While phy_pm_runtime_get{,_sync}() and phy_pm_runtime_put_sync() still
> contain pm_runtime_enabled() checks, the same check in
> phy_pm_runtime_put() was deemed redundant and removed, causing count
> underflows with PHY drivers like drivers/phy/renesas/phy-rcar-gen2.c
> that do not use Runtime PM yet,
>
> [...]
Applied, thanks!
[1/1] phy: core: Reinstate pm_runtime_enabled() check in phy_pm_runtime_put()
commit: 0287c960b15f27498d85cadf584bb59301ea2382
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH] phy: Kconfig: spacemit: add COMMON_CLK dependency
From: Vinod Koul @ 2026-01-01 11:07 UTC (permalink / raw)
To: neil.armstrong, Alex Elder
Cc: dlan, pjw, palmer, aou, alex, guodong, linux-phy, spacemit,
linux-riscv, linux-kernel, kernel test robot
In-Reply-To: <20251226173228.2020411-1-elder@riscstar.com>
On Fri, 26 Dec 2025 11:32:27 -0600, Alex Elder wrote:
> The SpacemiT PCIe PHY driver depends on the common clock framework.
> Not specifying that led to a failure when doing a COMPILE_TEST build
> for the SPARC architecture.
>
>
Applied, thanks!
[1/1] phy: Kconfig: spacemit: add COMMON_CLK dependency
commit: 8df20813eb01fe29b4507fd470d73675bda3e1dd
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH v2 0/2] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY
From: Vinod Koul @ 2026-01-01 11:07 UTC (permalink / raw)
To: Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Neil Armstrong, Abel Vesa
Cc: Wenbin Yao, linux-arm-msm, linux-phy, devicetree, linux-kernel,
Abel Vesa, Krzysztof Kozlowski
In-Reply-To: <20251216-phy-qcom-pcie-add-glymur-v2-0-566a75672599@oss.qualcomm.com>
On Tue, 16 Dec 2025 10:25:03 +0200, Abel Vesa wrote:
> The Glymur platform comes with two PCIe Gen4 2-lanes controllers.
>
> Add support for their PHYs and document the compatible.
>
>
Applied, thanks!
[1/2] dt-bindings: phy: sc8280xp-qmp-pcie: Document Glymur PCIe Gen4 2-lanes PHY
commit: 25671c37821006392ff8c66e980475747bee4cde
[2/2] phy: qcom: qmp-pcie: Add support for Glymur PCIe Gen4x2 PHY
commit: 085ba7c91df34e05366f9fecc9fa7a037598c30e
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH] phy: broadcom: ns-usb3: Fix Wvoid-pointer-to-enum-cast warning (again)
From: Vinod Koul @ 2026-01-01 11:07 UTC (permalink / raw)
To: Neil Armstrong, Nathan Chancellor, Nick Desaulniers,
Bill Wendling, Justin Stitt, Heiko Stuebner, Rob Herring,
linux-phy, linux-kernel, llvm, Krzysztof Kozlowski
In-Reply-To: <20251224115533.154162-2-krzysztof.kozlowski@oss.qualcomm.com>
On Wed, 24 Dec 2025 12:55:34 +0100, Krzysztof Kozlowski wrote:
> "family" is an enum, thus cast of pointer on 64-bit compile test with
> clang W=1 causes:
>
> phy-bcm-ns-usb3.c:206:17: error: cast to smaller integer type 'enum bcm_ns_family' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast]
>
> This was already fixed in commit bd6e74a2f0a0 ("phy: broadcom: ns-usb3:
> fix Wvoid-pointer-to-enum-cast warning") but then got bad in commit
> 21bf6fc47a1e ("phy: Use device_get_match_data()").
>
> [...]
Applied, thanks!
[1/1] phy: broadcom: ns-usb3: Fix Wvoid-pointer-to-enum-cast warning (again)
commit: fb21116099bbea1fc59efa9207e63c4be390ab72
Best regards,
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH 4/5] phy: usb: Add driver for Canaan K230 USB 2.0 PHY
From: Vinod Koul @ 2026-01-01 10:48 UTC (permalink / raw)
To: Jiayu Du
Cc: conor, gregkh, pjw, palmer, aou, alex, neil.armstrong, krzk+dt,
linux-riscv, devicetree, linux-kernel, linux-phy, linux-usb
In-Reply-To: <20251230023725.15966-5-jiayu.riscv@isrc.iscas.ac.cn>
On 30-12-25, 10:37, Jiayu Du wrote:
> Add driver for the USB 2.0 PHY in Canaan K230 SoC, which supports PHY
> initialization, power management and USB mode switching.
>
> Add Kconfig/Makefile under drivers/phy/canaan/.
>
> Signed-off-by: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
> ---
> drivers/phy/Kconfig | 1 +
> drivers/phy/Makefile | 1 +
> drivers/phy/canaan/Kconfig | 14 ++
> drivers/phy/canaan/Makefile | 2 +
> drivers/phy/canaan/phy-k230-usb.c | 272 ++++++++++++++++++++++++++++++
> 5 files changed, 290 insertions(+)
> create mode 100644 drivers/phy/canaan/Kconfig
> create mode 100644 drivers/phy/canaan/Makefile
> create mode 100644 drivers/phy/canaan/phy-k230-usb.c
>
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 678dd0452f0a..95e630749350 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -105,6 +105,7 @@ source "drivers/phy/allwinner/Kconfig"
> source "drivers/phy/amlogic/Kconfig"
> source "drivers/phy/broadcom/Kconfig"
> source "drivers/phy/cadence/Kconfig"
> +source "drivers/phy/canaan/Kconfig"
> source "drivers/phy/freescale/Kconfig"
> source "drivers/phy/hisilicon/Kconfig"
> source "drivers/phy/ingenic/Kconfig"
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index bfb27fb5a494..f07c68f2e283 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -17,6 +17,7 @@ obj-y += allwinner/ \
> amlogic/ \
> broadcom/ \
> cadence/ \
> + canaan/ \
> freescale/ \
> hisilicon/ \
> ingenic/ \
> diff --git a/drivers/phy/canaan/Kconfig b/drivers/phy/canaan/Kconfig
> new file mode 100644
> index 000000000000..1ff8831846d5
> --- /dev/null
> +++ b/drivers/phy/canaan/Kconfig
> @@ -0,0 +1,14 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +#
> +# Phy drivers for Canaan platforms
> +#
> +config PHY_CANAAN_USB
> + tristate "Canaan USB2 PHY Driver"
> + depends on (ARCH_CANAAN || COMPILE_TEST) && OF
> + select GENERIC_PHY
> + help
> + Enable this driver to support the USB 2.0 PHY controller
> + on Canaan K230 RISC-V SoCs. This PHY controller
> + provides physical layer functionality for USB 2.0 devices.
> + If you have a Canaan K230 board and need USB 2.0 support,
> + say Y or M here.
> diff --git a/drivers/phy/canaan/Makefile b/drivers/phy/canaan/Makefile
> new file mode 100644
> index 000000000000..d73857ba284e
> --- /dev/null
> +++ b/drivers/phy/canaan/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_PHY_CANAAN_USB) += phy-k230-usb.o
> diff --git a/drivers/phy/canaan/phy-k230-usb.c b/drivers/phy/canaan/phy-k230-usb.c
> new file mode 100644
> index 000000000000..668618fb2188
> --- /dev/null
> +++ b/drivers/phy/canaan/phy-k230-usb.c
> @@ -0,0 +1,272 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Canaan usb PHY driver
> + *
> + * Copyright (C) 2025 Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/of.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#define TEST_CTL3_OFFSET 0x0C
Lowercase hex values please.. do you need a test register :-)
> +#define CTL0_OFFSET 0x00
> +#define CTL1_OFFSET 0x04
> +#define USB_IDPULLUP0 BIT(4)
> +#define USB_DMPULLDOWN0 BIT(8)
> +#define USB_DPPULLDOWN0 BIT(9)
> +
> +/* USB control register 0 in HiSysConfig system controller */
> +/* PLL Integral Path Tune */
> +#define USB_CTL0_PLLITUNE_MASK GENMASK(23, 22)
> +
> +/* PLL Proportional Path Tune */
> +#define USB_CTL0_PLLPTUNE_MASK GENMASK(21, 18)
> +
> +/* PLL Bandwidth Adjustment */
> +#define USB_CTL0_PLLBTUNE_MASK GENMASK(17, 17)
> +
> +/* VReg18 Bypass Control */
> +#define USB_CTL0_VREGBYPASS_MASK GENMASK(16, 16)
> +
> +/* Retention Mode Enable */
> +#define USB_CTL0_RETENABLEN_MASK GENMASK(15, 15)
> +
> +/* Reserved Request Input */
> +#define USB_CTL0_RESREQIN_MASK GENMASK(14, 14)
> +
> +/* External VBUS Valid Select */
> +#define USB_CTL0_VBUSVLDEXTSEL0_MASK GENMASK(13, 13)
> +
> +/* OTG Block Disable Control */
> +#define USB_CTL0_OTGDISABLE0_MASK GENMASK(12, 12)
> +
> +/* Drive VBUS Enable */
> +#define USB_CTL0_DRVVBUS0_MASK GENMASK(11, 11)
> +
> +/* Autoresume Mode Enable */
> +#define USB_CTL0_AUTORSMENB0_MASK GENMASK(10, 10)
> +
> +/* HS Transceiver Asynchronous Control */
> +#define USB_CTL0_HSXCVREXTCTL0_MASK GENMASK(9, 9)
> +
> +/* USB 1.1 Transmit Data */
> +#define USB_CTL0_FSDATAEXT0_MASK GENMASK(8, 8)
> +
> +/* USB 1.1 SE0 Generation */
> +#define USB_CTL0_FSSE0EXT0_MASK GENMASK(7, 7)
> +
> +/* USB 1.1 Data Enable */
> +#define USB_CTL0_TXENABLEN0_MASK GENMASK(6, 6)
> +
> +/* Disconnect Threshold */
> +#define USB_CTL0_COMPDISTUNE0_MASK GENMASK(5, 3)
> +
> +/* Squelch Threshold */
> +#define USB_CTL0_SQRXTUNE0_MASK GENMASK(2, 0)
> +
> +/* USB control register 1 in HiSysConfig system controller */
> +/* Data Detect Voltage */
> +#define USB_CTL1_VDATREFTUNE0_MASK GENMASK(23, 22)
> +
> +/* VBUS Valid Threshold */
> +#define USB_CTL1_OTGTUNE0_MASK GENMASK(21, 19)
> +
> +/* Transmitter High-Speed Crossover */
> +#define USB_CTL1_TXHSXVTUNE0_MASK GENMASK(18, 17)
> +
> +/* FS/LS Source Impedance */
> +#define USB_CTL1_TXFSLSTUNE0_MASK GENMASK(16, 13)
> +
> +/* HS DC Voltage Level */
> +#define USB_CTL1_TXVREFTUNE0_MASK GENMASK(12, 9)
> +
> +/* HS Transmitter Rise/Fall Time */
> +#define USB_CTL1_TXRISETUNE0_MASK GENMASK(8, 7)
> +
> +/* USB Source Impedance */
> +#define USB_CTL1_TXRESTUNE0_MASK GENMASK(6, 5)
> +
> +/* HS Transmitter Pre-Emphasis Current Control */
> +#define USB_CTL1_TXPREEMPAMPTUNE0_MASK GENMASK(4, 3)
> +
> +/* HS Transmitter Pre-Emphasis Duration Control */
> +#define USB_CTL1_TXPREEMPPULSETUNE0_MASK GENMASK(2, 2)
> +
> +/* charging detection */
> +#define USB_CTL1_CHRGSRCPUENB0_MASK GENMASK(1, 0)
> +
> +#define K230_PHY_CTL0_VAL \
> +( \
> + FIELD_PREP(USB_CTL0_PLLITUNE_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_PLLPTUNE_MASK, 0xC) | \
lower hex here and rest
> + FIELD_PREP(USB_CTL0_PLLBTUNE_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL0_VREGBYPASS_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL0_RETENABLEN_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL0_RESREQIN_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_VBUSVLDEXTSEL0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_OTGDISABLE0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_DRVVBUS0_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL0_AUTORSMENB0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_HSXCVREXTCTL0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_FSDATAEXT0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_FSSE0EXT0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_TXENABLEN0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL0_COMPDISTUNE0_MASK, 0x3) | \
> + FIELD_PREP(USB_CTL0_SQRXTUNE0_MASK, 0x3) \
> +)
> +
> +#define K230_PHY_CTL1_VAL \
> +( \
> + FIELD_PREP(USB_CTL1_VDATREFTUNE0_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL1_OTGTUNE0_MASK, 0x3) | \
> + FIELD_PREP(USB_CTL1_TXHSXVTUNE0_MASK, 0x3) | \
> + FIELD_PREP(USB_CTL1_TXFSLSTUNE0_MASK, 0x3) | \
> + FIELD_PREP(USB_CTL1_TXVREFTUNE0_MASK, 0x3) | \
> + FIELD_PREP(USB_CTL1_TXRISETUNE0_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL1_TXRESTUNE0_MASK, 0x1) | \
> + FIELD_PREP(USB_CTL1_TXPREEMPAMPTUNE0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL1_TXPREEMPPULSETUNE0_MASK, 0x0) | \
> + FIELD_PREP(USB_CTL1_CHRGSRCPUENB0_MASK, 0x0) \
> +)
> +
> +struct k230_usb_phy {
> + struct regmap *regmap;
> + u32 reg_ctl_offset;
> + u32 reg_test_offset;
> + struct clk *clk;
> +};
> +
> +static int k230_usb_phy_power_on(struct phy *_phy)
> +{
> + struct k230_usb_phy *phy = phy_get_drvdata(_phy);
> + int ret;
> + u32 val;
> +
> + ret = clk_prepare_enable(phy->clk);
> + if (ret)
> + return ret;
> +
> + ret = regmap_write(phy->regmap, phy->reg_ctl_offset + CTL0_OFFSET,
> + K230_PHY_CTL0_VAL);
> + if (ret)
> + goto err_disable_clk;
> +
> + ret = regmap_write(phy->regmap, phy->reg_ctl_offset + CTL1_OFFSET,
> + K230_PHY_CTL1_VAL);
> + if (ret)
> + goto err_disable_clk;
> +
> + val |= USB_IDPULLUP0 | USB_DMPULLDOWN0 | USB_DPPULLDOWN0;
> +
> + ret = regmap_update_bits(phy->regmap, phy->reg_test_offset +
> + TEST_CTL3_OFFSET, val, val);
so we are writing to a test register..?
> + if (ret)
> + goto err_disable_clk;
> +
> + return 0;
> +
> +err_disable_clk:
> + clk_disable_unprepare(phy->clk);
> + return ret;
> +}
> +
> +static int k230_usb_phy_power_off(struct phy *_phy)
> +{
> + struct k230_usb_phy *phy = phy_get_drvdata(_phy);
> + int ret;
> + u32 val;
> +
> + val = USB_DMPULLDOWN0 | USB_DPPULLDOWN0;
> +
> + ret = regmap_update_bits(phy->regmap, phy->reg_test_offset +
> + TEST_CTL3_OFFSET, val, 0);
> + if (ret)
> + return ret;
> +
> + clk_disable_unprepare(phy->clk);
> +
> + return 0;
> +}
> +
> +static const struct phy_ops k230_usb_phy_ops = {
> + .power_on = k230_usb_phy_power_on,
> + .power_off = k230_usb_phy_power_off,
> + .owner = THIS_MODULE,
> +};
> +
> +static int k230_usb_phy_probe(struct platform_device *pdev)
> +{
> + int ret;
> + u32 offset;
> + struct regmap *regmap;
> + struct phy *generic_phy;
> + struct k230_usb_phy *phy;
> + struct phy_provider *provider;
> + struct device *dev = &pdev->dev;
reverse christmas tree order would look better...
> + regmap = syscon_node_to_regmap(dev->parent->of_node);
> + if (IS_ERR(regmap))
> + return dev_err_probe(dev, PTR_ERR(regmap),
> + "failed to get syscon regmap\n");
> +
> + phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
> + if (!phy)
> + return -ENOMEM;
> +
> + phy->regmap = regmap;
> +
> +
why two lines...?
> + ret = of_property_read_u32_index(dev->of_node, "reg", 0, &offset);
> + if (ret)
> + return dev_err_probe(dev, ret, "missing first reg offset\n");
> + phy->reg_test_offset = offset;
> +
> + ret = of_property_read_u32_index(dev->of_node, "reg", 2, &offset);
> + if (ret)
> + return dev_err_probe(dev, ret, "missing second reg offset\n");
> + phy->reg_ctl_offset = offset;
> +
> + phy->clk = devm_clk_get(dev, NULL);
> + if (IS_ERR(phy->clk))
> + return dev_err_probe(dev, PTR_ERR(phy->clk),
> + "failed to get clock\n");
> +
> + generic_phy = devm_phy_create(dev, dev->of_node, &k230_usb_phy_ops);
> +
> + if (IS_ERR(generic_phy))
> + return dev_err_probe(dev, PTR_ERR(generic_phy),
> + "failed to create PHY\n");
> +
> + phy_set_drvdata(generic_phy, phy);
> +
> + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
> + if (IS_ERR(provider))
> + return dev_err_probe(dev, PTR_ERR(provider),
> + "failed to register phy provider\n");
> +
> + return 0;
> +}
> +
> +static const struct of_device_id k230_usb_phy_of_match[] = {
> + { .compatible = "canaan,k230-usb-phy" },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, k230_usb_phy_of_match);
> +
> +static struct platform_driver k230_usb_phy_driver = {
> + .probe = k230_usb_phy_probe,
> + .driver = {
> + .name = "k230-usb-phy",
> + .of_match_table = k230_usb_phy_of_match,
> + },
> +};
> +module_platform_driver(k230_usb_phy_driver);
> +
> +MODULE_DESCRIPTION("Canaan Kendryte K230 USB 2.0 PHY driver");
> +MODULE_AUTHOR("Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>");
> +MODULE_LICENSE("GPL");
> --
> 2.52.0
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH v4 2/7] mux: Add helper functions for getting optional and selected mux-state
From: kernel test robot @ 2025-12-31 19:18 UTC (permalink / raw)
To: Josua Mayer, Ulf Hansson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Geert Uytterhoeven, Magnus Damm, Wolfram Sang,
Marc Kleine-Budde, Vincent Mailhol, Vinod Koul,
Kishon Vijay Abraham I, Peter Rosin, Aaro Koskinen,
Andreas Kemnade, Kevin Hilman, Roger Quadros, Tony Lindgren,
Vignesh R, Janusz Krzysztofik, Andi Shyti, Neil Armstrong
Cc: oe-kbuild-all, Mikhail Anikin, Yazan Shhady, Jon Nettleton,
linux-mmc, devicetree, linux-kernel, linux-renesas-soc, linux-can,
linux-phy
In-Reply-To: <20251229-rz-sdio-mux-v4-2-a023e55758fe@solid-run.com>
Hi Josua,
kernel test robot noticed the following build errors:
[auto build test ERROR on 8f0b4cce4481fb22653697cced8d0d04027cb1e8]
url: https://github.com/intel-lab-lkp/linux/commits/Josua-Mayer/phy-can-transceiver-rename-temporary-helper-function-to-avoid-conflict/20251229-223153
base: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
patch link: https://lore.kernel.org/r/20251229-rz-sdio-mux-v4-2-a023e55758fe%40solid-run.com
patch subject: [PATCH v4 2/7] mux: Add helper functions for getting optional and selected mux-state
config: parisc-randconfig-002-20260101 (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 10.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601010305.tpY47HE4-lkp@intel.com/
All error/warnings (new ones prefixed by >>):
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h: In function 'mux_control_put':
>> include/linux/mux/consumer.h:138:9: warning: 'return' with a value, in function returning void [-Wreturn-type]
138 | return -EOPNOTSUPP;
| ^
include/linux/mux/consumer.h:136:20: note: declared here
136 | static inline void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
drivers/mux/core.c: At top level:
>> drivers/mux/core.c:302:14: error: redefinition of 'mux_control_states'
302 | unsigned int mux_control_states(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:70:28: note: previous definition of 'mux_control_states' was here
70 | static inline unsigned int mux_control_states(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:365:5: error: redefinition of 'mux_control_select_delay'
365 | int mux_control_select_delay(struct mux_control *mux, unsigned int state,
| ^~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:74:32: note: previous definition of 'mux_control_select_delay' was here
74 | static inline int __must_check mux_control_select_delay(struct mux_control *mux,
| ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:403:5: error: redefinition of 'mux_state_select_delay'
403 | int mux_state_select_delay(struct mux_state *mstate, unsigned int delay_us)
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:79:32: note: previous definition of 'mux_state_select_delay' was here
79 | static inline int __must_check mux_state_select_delay(struct mux_state *mstate,
| ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:425:5: error: redefinition of 'mux_control_try_select_delay'
425 | int mux_control_try_select_delay(struct mux_control *mux, unsigned int state,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:84:32: note: previous definition of 'mux_control_try_select_delay' was here
84 | static inline int __must_check mux_control_try_select_delay(struct mux_control *mux,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:459:5: error: redefinition of 'mux_state_try_select_delay'
459 | int mux_state_try_select_delay(struct mux_state *mstate, unsigned int delay_us)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:90:32: note: previous definition of 'mux_state_try_select_delay' was here
90 | static inline int __must_check mux_state_try_select_delay(struct mux_state *mstate,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:477:5: error: redefinition of 'mux_control_deselect'
477 | int mux_control_deselect(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:118:19: note: previous definition of 'mux_control_deselect' was here
118 | static inline int mux_control_deselect(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:503:5: error: redefinition of 'mux_state_deselect'
503 | int mux_state_deselect(struct mux_state *mstate)
| ^~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:122:19: note: previous definition of 'mux_state_deselect' was here
122 | static inline int mux_state_deselect(struct mux_state *mstate)
| ^~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:625:21: error: redefinition of 'mux_control_get'
625 | struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:127:35: note: previous definition of 'mux_control_get' was here
127 | static inline struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~
>> drivers/mux/core.c:638:21: error: redefinition of 'mux_control_get_optional'
638 | struct mux_control *mux_control_get_optional(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:131:35: note: previous definition of 'mux_control_get_optional' was here
131 | static inline struct mux_control *mux_control_get_optional(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:650:6: error: redefinition of 'mux_control_put'
650 | void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:136:20: note: previous definition of 'mux_control_put' was here
136 | static inline void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
>> drivers/mux/core.c:671:21: error: redefinition of 'devm_mux_control_get'
671 | struct mux_control *devm_mux_control_get(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:141:35: note: previous definition of 'devm_mux_control_get' was here
141 | static inline struct mux_control *devm_mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:774:19: error: redefinition of 'devm_mux_state_get'
774 | struct mux_state *devm_mux_state_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:145:33: note: previous definition of 'devm_mux_state_get' was here
145 | static inline struct mux_state *devm_mux_state_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:788:19: error: redefinition of 'devm_mux_state_get_optional'
788 | struct mux_state *devm_mux_state_get_optional(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:149:33: note: previous definition of 'devm_mux_state_get_optional' was here
149 | static inline struct mux_state *devm_mux_state_get_optional(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:838:19: error: redefinition of 'devm_mux_state_get_selected'
838 | struct mux_state *devm_mux_state_get_selected(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:154:33: note: previous definition of 'devm_mux_state_get_selected' was here
154 | static inline struct mux_state *devm_mux_state_get_selected(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mux/core.c:854:19: error: redefinition of 'devm_mux_state_get_optional_selected'
854 | struct mux_state *devm_mux_state_get_optional_selected(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/mux/core.c:19:
include/linux/mux/consumer.h:159:33: note: previous definition of 'devm_mux_state_get_optional_selected' was here
159 | static inline struct mux_state *devm_mux_state_get_optional_selected(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--
In file included from core.c:19:
include/linux/mux/consumer.h: In function 'mux_control_put':
>> include/linux/mux/consumer.h:138:9: warning: 'return' with a value, in function returning void [-Wreturn-type]
138 | return -EOPNOTSUPP;
| ^
include/linux/mux/consumer.h:136:20: note: declared here
136 | static inline void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
core.c: At top level:
core.c:302:14: error: redefinition of 'mux_control_states'
302 | unsigned int mux_control_states(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:70:28: note: previous definition of 'mux_control_states' was here
70 | static inline unsigned int mux_control_states(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~
core.c:365:5: error: redefinition of 'mux_control_select_delay'
365 | int mux_control_select_delay(struct mux_control *mux, unsigned int state,
| ^~~~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:74:32: note: previous definition of 'mux_control_select_delay' was here
74 | static inline int __must_check mux_control_select_delay(struct mux_control *mux,
| ^~~~~~~~~~~~~~~~~~~~~~~~
core.c:403:5: error: redefinition of 'mux_state_select_delay'
403 | int mux_state_select_delay(struct mux_state *mstate, unsigned int delay_us)
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:79:32: note: previous definition of 'mux_state_select_delay' was here
79 | static inline int __must_check mux_state_select_delay(struct mux_state *mstate,
| ^~~~~~~~~~~~~~~~~~~~~~
core.c:425:5: error: redefinition of 'mux_control_try_select_delay'
425 | int mux_control_try_select_delay(struct mux_control *mux, unsigned int state,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:84:32: note: previous definition of 'mux_control_try_select_delay' was here
84 | static inline int __must_check mux_control_try_select_delay(struct mux_control *mux,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
core.c:459:5: error: redefinition of 'mux_state_try_select_delay'
459 | int mux_state_try_select_delay(struct mux_state *mstate, unsigned int delay_us)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:90:32: note: previous definition of 'mux_state_try_select_delay' was here
90 | static inline int __must_check mux_state_try_select_delay(struct mux_state *mstate,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
core.c:477:5: error: redefinition of 'mux_control_deselect'
477 | int mux_control_deselect(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:118:19: note: previous definition of 'mux_control_deselect' was here
118 | static inline int mux_control_deselect(struct mux_control *mux)
| ^~~~~~~~~~~~~~~~~~~~
core.c:503:5: error: redefinition of 'mux_state_deselect'
503 | int mux_state_deselect(struct mux_state *mstate)
| ^~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:122:19: note: previous definition of 'mux_state_deselect' was here
122 | static inline int mux_state_deselect(struct mux_state *mstate)
| ^~~~~~~~~~~~~~~~~~
core.c:625:21: error: redefinition of 'mux_control_get'
625 | struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:127:35: note: previous definition of 'mux_control_get' was here
127 | static inline struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~
core.c:638:21: error: redefinition of 'mux_control_get_optional'
638 | struct mux_control *mux_control_get_optional(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:131:35: note: previous definition of 'mux_control_get_optional' was here
131 | static inline struct mux_control *mux_control_get_optional(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~
core.c:650:6: error: redefinition of 'mux_control_put'
650 | void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:136:20: note: previous definition of 'mux_control_put' was here
136 | static inline void mux_control_put(struct mux_control *mux)
| ^~~~~~~~~~~~~~~
core.c:671:21: error: redefinition of 'devm_mux_control_get'
671 | struct mux_control *devm_mux_control_get(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:141:35: note: previous definition of 'devm_mux_control_get' was here
141 | static inline struct mux_control *devm_mux_control_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~
core.c:774:19: error: redefinition of 'devm_mux_state_get'
774 | struct mux_state *devm_mux_state_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:145:33: note: previous definition of 'devm_mux_state_get' was here
145 | static inline struct mux_state *devm_mux_state_get(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~
core.c:788:19: error: redefinition of 'devm_mux_state_get_optional'
788 | struct mux_state *devm_mux_state_get_optional(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from core.c:19:
include/linux/mux/consumer.h:149:33: note: previous definition of 'devm_mux_state_get_optional' was here
149 | static inline struct mux_state *devm_mux_state_get_optional(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
core.c:838:19: error: redefinition of 'devm_mux_state_get_selected'
838 | struct mux_state *devm_mux_state_get_selected(struct device *dev, const char *mux_name)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/mux_control_states +302 drivers/mux/core.c
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 295
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 296 /**
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 297 * mux_control_states() - Query the number of multiplexer states.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 298 * @mux: The mux-control to query.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 299 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 300 * Return: The number of multiplexer states.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 301 */
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 @302 unsigned int mux_control_states(struct mux_control *mux)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 303 {
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 304 return mux->states;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 305 }
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 306 EXPORT_SYMBOL_GPL(mux_control_states);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 307
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 308 /*
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 309 * The mux->lock must be down when calling this function.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 310 */
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 311 static int __mux_control_select(struct mux_control *mux, int state)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 312 {
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 313 int ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 314
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 315 if (WARN_ON(state < 0 || state >= mux->states))
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 316 return -EINVAL;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 317
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 318 if (mux->cached_state == state)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 319 return 0;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 320
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 321 ret = mux_control_set(mux, state);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 322 if (ret >= 0)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 323 return 0;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 324
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 325 /* The mux update failed, try to revert if appropriate... */
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 326 if (mux->idle_state != MUX_IDLE_AS_IS)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 327 mux_control_set(mux, mux->idle_state);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 328
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 329 return ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 330 }
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 331
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 332 static void mux_control_delay(struct mux_control *mux, unsigned int delay_us)
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 333 {
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 334 ktime_t delayend;
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 335 s64 remaining;
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 336
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 337 if (!delay_us)
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 338 return;
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 339
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 340 delayend = ktime_add_us(mux->last_change, delay_us);
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 341 remaining = ktime_us_delta(delayend, ktime_get());
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 342 if (remaining > 0)
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 343 fsleep(remaining);
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 344 }
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 345
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 346 /**
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 347 * mux_control_select_delay() - Select the given multiplexer state.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 348 * @mux: The mux-control to request a change of state from.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 349 * @state: The new requested state.
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 350 * @delay_us: The time to delay (in microseconds) if the mux state is changed.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 351 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 352 * On successfully selecting the mux-control state, it will be locked until
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 353 * there is a call to mux_control_deselect(). If the mux-control is already
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 354 * selected when mux_control_select() is called, the caller will be blocked
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 355 * until mux_control_deselect() or mux_state_deselect() is called (by someone
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 356 * else).
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 357 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 358 * Therefore, make sure to call mux_control_deselect() when the operation is
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 359 * complete and the mux-control is free for others to use, but do not call
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 360 * mux_control_deselect() if mux_control_select() fails.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 361 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 362 * Return: 0 when the mux-control state has the requested state or a negative
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 363 * errno on error.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 364 */
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 @365 int mux_control_select_delay(struct mux_control *mux, unsigned int state,
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 366 unsigned int delay_us)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 367 {
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 368 int ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 369
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 370 ret = down_killable(&mux->lock);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 371 if (ret < 0)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 372 return ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 373
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 374 ret = __mux_control_select(mux, state);
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 375 if (ret >= 0)
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 376 mux_control_delay(mux, delay_us);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 377
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 378 if (ret < 0)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 379 up(&mux->lock);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 380
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 381 return ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 382 }
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 383 EXPORT_SYMBOL_GPL(mux_control_select_delay);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 384
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 385 /**
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 386 * mux_state_select_delay() - Select the given multiplexer state.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 387 * @mstate: The mux-state to select.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 388 * @delay_us: The time to delay (in microseconds) if the mux state is changed.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 389 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 390 * On successfully selecting the mux-state, its mux-control will be locked
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 391 * until there is a call to mux_state_deselect(). If the mux-control is already
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 392 * selected when mux_state_select() is called, the caller will be blocked
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 393 * until mux_state_deselect() or mux_control_deselect() is called (by someone
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 394 * else).
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 395 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 396 * Therefore, make sure to call mux_state_deselect() when the operation is
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 397 * complete and the mux-control is free for others to use, but do not call
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 398 * mux_state_deselect() if mux_state_select() fails.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 399 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 400 * Return: 0 when the mux-state has been selected or a negative
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 401 * errno on error.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 402 */
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 @403 int mux_state_select_delay(struct mux_state *mstate, unsigned int delay_us)
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 404 {
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 405 return mux_control_select_delay(mstate->mux, mstate->state, delay_us);
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 406 }
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 407 EXPORT_SYMBOL_GPL(mux_state_select_delay);
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 408
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 409 /**
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 410 * mux_control_try_select_delay() - Try to select the given multiplexer state.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 411 * @mux: The mux-control to request a change of state from.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 412 * @state: The new requested state.
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 413 * @delay_us: The time to delay (in microseconds) if the mux state is changed.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 414 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 415 * On successfully selecting the mux-control state, it will be locked until
f22d1117b9c3e2 drivers/mux/core.c Peter Rosin 2022-01-07 416 * mux_control_deselect() is called.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 417 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 418 * Therefore, make sure to call mux_control_deselect() when the operation is
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 419 * complete and the mux-control is free for others to use, but do not call
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 420 * mux_control_deselect() if mux_control_try_select() fails.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 421 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 422 * Return: 0 when the mux-control state has the requested state or a negative
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 423 * errno on error. Specifically -EBUSY if the mux-control is contended.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 424 */
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 @425 int mux_control_try_select_delay(struct mux_control *mux, unsigned int state,
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 426 unsigned int delay_us)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 427 {
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 428 int ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 429
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 430 if (down_trylock(&mux->lock))
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 431 return -EBUSY;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 432
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 433 ret = __mux_control_select(mux, state);
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 434 if (ret >= 0)
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 435 mux_control_delay(mux, delay_us);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 436
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 437 if (ret < 0)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 438 up(&mux->lock);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 439
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 440 return ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 441 }
17b5b576ff5faf drivers/mux/core.c Vincent Whitchurch 2021-10-07 442 EXPORT_SYMBOL_GPL(mux_control_try_select_delay);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 443
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 444 /**
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 445 * mux_state_try_select_delay() - Try to select the given multiplexer state.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 446 * @mstate: The mux-state to select.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 447 * @delay_us: The time to delay (in microseconds) if the mux state is changed.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 448 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 449 * On successfully selecting the mux-state, its mux-control will be locked
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 450 * until mux_state_deselect() is called.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 451 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 452 * Therefore, make sure to call mux_state_deselect() when the operation is
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 453 * complete and the mux-control is free for others to use, but do not call
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 454 * mux_state_deselect() if mux_state_try_select() fails.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 455 *
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 456 * Return: 0 when the mux-state has been selected or a negative errno on
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 457 * error. Specifically -EBUSY if the mux-control is contended.
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 458 */
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 @459 int mux_state_try_select_delay(struct mux_state *mstate, unsigned int delay_us)
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 460 {
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 461 return mux_control_try_select_delay(mstate->mux, mstate->state, delay_us);
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 462 }
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 463 EXPORT_SYMBOL_GPL(mux_state_try_select_delay);
84564481bc4520 drivers/mux/core.c Aswath Govindraju 2022-01-07 464
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 465 /**
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 466 * mux_control_deselect() - Deselect the previously selected multiplexer state.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 467 * @mux: The mux-control to deselect.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 468 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 469 * It is required that a single call is made to mux_control_deselect() for
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 470 * each and every successful call made to either of mux_control_select() or
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 471 * mux_control_try_select().
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 472 *
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 473 * Return: 0 on success and a negative errno on error. An error can only
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 474 * occur if the mux has an idle state. Note that even if an error occurs, the
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 475 * mux-control is unlocked and is thus free for the next access.
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 476 */
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 @477 int mux_control_deselect(struct mux_control *mux)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 478 {
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 479 int ret = 0;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 480
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 481 if (mux->idle_state != MUX_IDLE_AS_IS &&
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 482 mux->idle_state != mux->cached_state)
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 483 ret = mux_control_set(mux, mux->idle_state);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 484
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 485 up(&mux->lock);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 486
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 487 return ret;
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 488 }
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 489 EXPORT_SYMBOL_GPL(mux_control_deselect);
a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin 2017-05-14 490
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH V2 3/4] arm64: dts: qcom: hamoa: Add UFS nodes for x1e80100 SoC
From: Konrad Dybcio @ 2025-12-31 11:55 UTC (permalink / raw)
To: Pradeep P V K, vkoul, neil.armstrong, robh, krzk+dt, conor+dt,
martin.petersen, andersson, konradybcio, taniya.das,
dmitry.baryshkov, manivannan.sadhasivam
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, linux-scsi,
nitin.rawat
In-Reply-To: <20251231101951.1026163-4-pradeep.pragallapati@oss.qualcomm.com>
On 12/31/25 11:19 AM, Pradeep P V K wrote:
> Add UFS host controller and PHY nodes for x1e80100 SoC.
>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* Re: [PATCH V2 4/4] arm64: dts: qcom: hamoa-iot-evk: Enable UFS
From: Konrad Dybcio @ 2025-12-31 11:55 UTC (permalink / raw)
To: Pradeep P V K, vkoul, neil.armstrong, robh, krzk+dt, conor+dt,
martin.petersen, andersson, konradybcio, taniya.das,
dmitry.baryshkov, manivannan.sadhasivam
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, linux-scsi,
nitin.rawat
In-Reply-To: <20251231101951.1026163-5-pradeep.pragallapati@oss.qualcomm.com>
On 12/31/25 11:19 AM, Pradeep P V K wrote:
> Enable UFS for HAMOA-IOT-EVK board.
>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply
* [PATCH V2 4/4] arm64: dts: qcom: hamoa-iot-evk: Enable UFS
From: Pradeep P V K @ 2025-12-31 10:19 UTC (permalink / raw)
To: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, martin.petersen,
andersson, konradybcio, taniya.das, dmitry.baryshkov,
manivannan.sadhasivam
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, linux-scsi,
nitin.rawat, Pradeep P V K
In-Reply-To: <20251231101951.1026163-1-pradeep.pragallapati@oss.qualcomm.com>
Enable UFS for HAMOA-IOT-EVK board.
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
index 36dd6599402b..2b1e643975d9 100644
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
@@ -1190,6 +1190,24 @@ &uart21 {
status = "okay";
};
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l3i_0p8>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 238 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l17b_2p5>;
+ vcc-max-microamp = <1300000>;
+ vccq-supply = <&vreg_l2i_1p2>;
+ vccq-max-microamp = <1200000>;
+
+ status = "okay";
+};
+
&usb_1_ss0_dwc3_hs {
remote-endpoint = <&pmic_glink_ss0_hs_in>;
};
--
2.34.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
* [PATCH V2 3/4] arm64: dts: qcom: hamoa: Add UFS nodes for x1e80100 SoC
From: Pradeep P V K @ 2025-12-31 10:19 UTC (permalink / raw)
To: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, martin.petersen,
andersson, konradybcio, taniya.das, dmitry.baryshkov,
manivannan.sadhasivam
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, linux-scsi,
nitin.rawat, Pradeep P V K
In-Reply-To: <20251231101951.1026163-1-pradeep.pragallapati@oss.qualcomm.com>
Add UFS host controller and PHY nodes for x1e80100 SoC.
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa.dtsi | 123 +++++++++++++++++++++++++++-
1 file changed, 120 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 21ab6ef61520..cd7e2f130fe2 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -835,9 +835,9 @@ gcc: clock-controller@100000 {
<0>,
<0>,
<0>,
- <0>,
- <0>,
- <0>;
+ <&ufs_mem_phy 0>,
+ <&ufs_mem_phy 1>,
+ <&ufs_mem_phy 2>;
power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
@@ -3848,6 +3848,123 @@ pcie4_phy: phy@1c0e000 {
status = "disabled";
};
+ ufs_mem_phy: phy@1d80000 {
+ compatible = "qcom,x1e80100-qmp-ufs-phy",
+ "qcom,sm8550-qmp-ufs-phy";
+ reg = <0x0 0x01d80000 0x0 0x2000>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
+ <&tcsr TCSR_UFS_PHY_CLKREF_EN>;
+
+ clock-names = "ref",
+ "ref_aux",
+ "qref";
+ resets = <&ufs_mem_hc 0>;
+ reset-names = "ufsphy";
+
+ power-domains = <&gcc GCC_UFS_MEM_PHY_GDSC>;
+
+ #clock-cells = <1>;
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ ufs_mem_hc: ufs@1d84000 {
+ compatible = "qcom,x1e80100-ufshc",
+ "qcom,sm8550-ufshc",
+ "qcom,ufshc",
+ "jedec,ufs-2.0";
+ reg = <0x0 0x01d84000 0x0 0x3000>;
+
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>,
+ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
+ <&rpmhcc RPMH_LN_BB_CLK3>,
+ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
+
+ operating-points-v2 = <&ufs_opp_table>;
+
+ resets = <&gcc GCC_UFS_PHY_BCR>;
+ reset-names = "rst";
+
+ interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+ <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+ interconnect-names = "ufs-ddr",
+ "cpu-ufs";
+
+ power-domains = <&gcc GCC_UFS_PHY_GDSC>;
+ required-opps = <&rpmhpd_opp_nom>;
+
+ iommus = <&apps_smmu 0x1a0 0>;
+ dma-coherent;
+
+ lanes-per-direction = <2>;
+
+ phys = <&ufs_mem_phy>;
+ phy-names = "ufsphy";
+
+ #reset-cells = <1>;
+
+ status = "disabled";
+
+ ufs_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-75000000 {
+ opp-hz = /bits/ 64 <75000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <75000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-150000000 {
+ opp-hz = /bits/ 64 <150000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <150000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <300000000>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>,
+ /bits/ 64 <0>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
cryptobam: dma-controller@1dc4000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x01dc4000 0x0 0x28000>;
--
2.34.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox