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* [PATCH v5 08/24] scsi: ufs: mediatek: Rework init function
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

Printing an error message on ENOMEM is pointless. The print will not
work because there is no memory.

Adding an of_match_device to the init function is pointless. Why would a
different device with a different probe function ever use the same init
function? Get rid of it.

zero-initialising an error variable just so you can then goto a bare
return statement with that error variable to signal success is also
pointless, just return directly, there's no unwind being done.

Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/ufs/host/ufs-mediatek.c | 19 ++++---------------
 1 file changed, 4 insertions(+), 15 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 7fcf4ceeb56e..4cb1a1b400ac 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1248,29 +1248,19 @@ static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
  */
 static int ufs_mtk_init(struct ufs_hba *hba)
 {
-	const struct of_device_id *id;
 	struct device *dev = hba->dev;
 	struct ufs_mtk_host *host;
 	struct Scsi_Host *shost = hba->host;
-	int err = 0;
+	int err;
 	struct arm_smccc_res res;
 
 	host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
-	if (!host) {
-		err = -ENOMEM;
-		dev_info(dev, "%s: no memory for mtk ufs host\n", __func__);
-		goto out;
-	}
+	if (!host)
+		return -ENOMEM;
 
 	host->hba = hba;
 	ufshcd_set_variant(hba, host);
 
-	id = of_match_device(ufs_mtk_of_match, dev);
-	if (!id) {
-		err = -EINVAL;
-		goto out;
-	}
-
 	/* Initialize host capability */
 	ufs_mtk_init_host_caps(hba);
 
@@ -1344,11 +1334,10 @@ static int ufs_mtk_init(struct ufs_hba *hba)
 
 	ufs_mtk_get_hw_ip_version(hba);
 
-	goto out;
+	return 0;
 
 out_variant_clear:
 	ufshcd_set_variant(hba, NULL);
-out:
 	return err;
 }
 

-- 
2.52.0


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* [PATCH v5 07/24] scsi: ufs: mediatek: Rework 0.9V regulator
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

The mediatek UFS host driver does some pretty bad stuff with regards to
the 0.9V regulator. Instead of just checking for the presence of the
regulator, it adds a cap if it's there, and then checks for the cap. It
also sleeps to stabilise the supply after enabling the regulator, which
is something that should be done by the regulator framework with the
appropriate delay properties in the DTS instead of random sleeps in the
driver code.

Rework this code and rename it to the avdd09 name I've chosen in the
binding for this supply name, instead of the downstream "va09" name that
isn't used by the datasheets for any of these chips.

Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/ufs/host/ufs-mediatek.c | 153 ++++++++++++++++++++++++++--------------
 drivers/ufs/host/ufs-mediatek.h |   3 +-
 2 files changed, 101 insertions(+), 55 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 5cf5f4c94b8f..7fcf4ceeb56e 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -38,6 +38,10 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up);
 #define MAX_SUPP_MAC 64
 #define MCQ_QUEUE_OFFSET(c) ((((c) >> 16) & 0xFF) * 0x200)
 
+struct ufs_mtk_soc_data {
+	bool has_avdd09;
+};
+
 static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
 	{ .wmanufacturerid = UFS_ANY_VENDOR,
 	  .model = UFS_ANY_MODEL,
@@ -48,13 +52,6 @@ static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
 	{}
 };
 
-static const struct of_device_id ufs_mtk_of_match[] = {
-	{ .compatible = "mediatek,mt8183-ufshci" },
-	{ .compatible = "mediatek,mt8195-ufshci" },
-	{},
-};
-MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
-
 /*
  * Details of UIC Errors
  */
@@ -106,13 +103,6 @@ static bool ufs_mtk_is_boost_crypt_enabled(struct ufs_hba *hba)
 	return host->caps & UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
 }
 
-static bool ufs_mtk_is_va09_supported(struct ufs_hba *hba)
-{
-	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
-
-	return host->caps & UFS_MTK_CAP_VA09_PWR_CTRL;
-}
-
 static bool ufs_mtk_is_broken_vcc(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -506,44 +496,70 @@ static int ufs_mtk_wait_link_state(struct ufs_hba *hba, u32 state,
 	return -ETIMEDOUT;
 }
 
+static int ufs_mtk_09v_off(struct ufs_mtk_host *host)
+{
+	struct arm_smccc_res res;
+	int ret;
+
+	if (!host->reg_avdd09)
+		return 0;
+
+	ufs_mtk_va09_pwr_ctrl(res, 0);
+	ret = regulator_disable(host->reg_avdd09);
+	if (ret) {
+		dev_err(host->hba->dev, "Failed to disable avdd09-supply: %pe\n",
+			ERR_PTR(ret));
+		ufs_mtk_va09_pwr_ctrl(res, 1);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int ufs_mtk_09v_on(struct ufs_mtk_host *host)
+{
+	struct arm_smccc_res res;
+	int ret;
+
+	if (!host->reg_avdd09)
+		return 0;
+
+	ret = regulator_enable(host->reg_avdd09);
+	if (ret) {
+		dev_err(host->hba->dev, "Failed to enable avdd09-supply: %pe\n",
+			ERR_PTR(ret));
+		return ret;
+	}
+
+	ufs_mtk_va09_pwr_ctrl(res, 1);
+
+	return 0;
+}
+
 static int ufs_mtk_mphy_power_on(struct ufs_hba *hba, bool on)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
 	struct phy *mphy = host->mphy;
-	struct arm_smccc_res res;
-	int ret = 0;
+	int ret;
 
-	if (!mphy || !(on ^ host->mphy_powered_on))
+	if (!mphy || on == host->mphy_powered_on)
 		return 0;
 
 	if (on) {
-		if (ufs_mtk_is_va09_supported(hba)) {
-			ret = regulator_enable(host->reg_va09);
-			if (ret < 0)
-				goto out;
-			/* wait 200 us to stablize VA09 */
-			usleep_range(200, 210);
-			ufs_mtk_va09_pwr_ctrl(res, 1);
-		}
+		ret = ufs_mtk_09v_on(host);
+		if (ret)
+			return ret;
 		phy_power_on(mphy);
 	} else {
 		phy_power_off(mphy);
-		if (ufs_mtk_is_va09_supported(hba)) {
-			ufs_mtk_va09_pwr_ctrl(res, 0);
-			ret = regulator_disable(host->reg_va09);
-		}
-	}
-out:
-	if (ret) {
-		dev_info(hba->dev,
-			 "failed to %s va09: %d\n",
-			 on ? "enable" : "disable",
-			 ret);
-	} else {
-		host->mphy_powered_on = on;
+		ret = ufs_mtk_09v_off(host);
+		if (ret)
+			return ret;
 	}
 
-	return ret;
+	host->mphy_powered_on = on;
+
+	return 0;
 }
 
 static int ufs_mtk_get_host_clk(struct device *dev, const char *name,
@@ -678,17 +694,6 @@ static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
 	return;
 }
 
-static void ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
-{
-	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
-
-	host->reg_va09 = regulator_get(hba->dev, "va09");
-	if (IS_ERR(host->reg_va09))
-		dev_info(hba->dev, "failed to get va09");
-	else
-		host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL;
-}
-
 static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -697,9 +702,6 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
 	if (of_property_read_bool(np, "mediatek,ufs-boost-crypt"))
 		ufs_mtk_init_boost_crypt(hba);
 
-	if (of_property_read_bool(np, "mediatek,ufs-support-va09"))
-		ufs_mtk_init_va09_pwr_ctrl(hba);
-
 	if (of_property_read_bool(np, "mediatek,ufs-disable-ah8"))
 		host->caps |= UFS_MTK_CAP_DISABLE_AH8;
 
@@ -1205,6 +1207,35 @@ static void ufs_mtk_init_mcq_irq(struct ufs_hba *hba)
 	host->mcq_nr_intr = 0;
 }
 
+/**
+ * ufs_mtk_get_supplies - acquire variant-specific supplies
+ * @host: pointer to driver's private &struct ufs_mtk_host instance
+ *
+ * Returns 0 on success, negative errno on error.
+ */
+static int ufs_mtk_get_supplies(struct ufs_mtk_host *host)
+{
+	struct device *dev = host->hba->dev;
+	const struct ufs_mtk_soc_data *data = of_device_get_match_data(dev);
+
+	if (!data || !data->has_avdd09)
+		return 0;
+
+	host->reg_avdd09 = devm_regulator_get_optional(dev, "avdd09");
+	if (IS_ERR(host->reg_avdd09)) {
+		if (PTR_ERR(host->reg_avdd09) == -ENODEV) {
+			host->reg_avdd09 = NULL;
+			return 0;
+		}
+
+		dev_err(dev, "Failed to get avdd09 regulator: %pe\n",
+			host->reg_avdd09);
+		return PTR_ERR(host->reg_avdd09);
+	}
+
+	return 0;
+}
+
 /**
  * ufs_mtk_init - find other essential mmio bases
  * @hba: host controller instance
@@ -1288,6 +1319,10 @@ static int ufs_mtk_init(struct ufs_hba *hba)
 
 	ufs_mtk_init_clocks(hba);
 
+	err = ufs_mtk_get_supplies(host);
+	if (err)
+		goto out_variant_clear;
+
 	/*
 	 * ufshcd_vops_init() is invoked after
 	 * ufshcd_setup_clock(true) in ufshcd_hba_init() thus
@@ -2336,6 +2371,18 @@ static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
 	.config_scsi_dev     = ufs_mtk_config_scsi_dev,
 };
 
+static const struct ufs_mtk_soc_data mt8183_data = {
+	.has_avdd09 = true,
+};
+
+static const struct of_device_id ufs_mtk_of_match[] = {
+	{ .compatible = "mediatek,mt8183-ufshci", .data = &mt8183_data },
+	{ .compatible = "mediatek,mt8192-ufshci" },
+	{ .compatible = "mediatek,mt8195-ufshci" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, ufs_mtk_of_match);
+
 /**
  * ufs_mtk_probe - probe routine of the driver
  * @pdev: pointer to Platform device handle
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 4fce29d131d1..24c8941f6b86 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -125,7 +125,6 @@ enum {
  */
 enum ufs_mtk_host_caps {
 	UFS_MTK_CAP_BOOST_CRYPT_ENGINE         = 1 << 0,
-	UFS_MTK_CAP_VA09_PWR_CTRL              = 1 << 1,
 	UFS_MTK_CAP_DISABLE_AH8                = 1 << 2,
 	UFS_MTK_CAP_BROKEN_VCC                 = 1 << 3,
 
@@ -176,7 +175,7 @@ struct ufs_mtk_mcq_intr_info {
 
 struct ufs_mtk_host {
 	struct phy *mphy;
-	struct regulator *reg_va09;
+	struct regulator *reg_avdd09;
 	struct reset_control_bulk_data resets[MTK_UFS_NUM_RESETS];
 	struct ufs_hba *hba;
 	struct ufs_mtk_crypt_cfg *crypt;

-- 
2.52.0


-- 
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* [PATCH v5 06/24] scsi: ufs: mediatek: Rework resets
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

Rework the reset control getting in the driver's probe function to use
the bulk reset APIs. Use the optional variant instead of defaulting to
NULL if the resets fail, so that absent resets can be distinguished from
erroneous resets.

Also remove all remnants of the MPHY reset ever having lived in this
driver.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/ufs/host/ufs-mediatek-sip.h |  8 ----
 drivers/ufs/host/ufs-mediatek.c     | 78 ++++++++++++++++++-------------------
 drivers/ufs/host/ufs-mediatek.h     |  7 ++--
 3 files changed, 42 insertions(+), 51 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h
index d627dfb4a766..256598cc3b5b 100644
--- a/drivers/ufs/host/ufs-mediatek-sip.h
+++ b/drivers/ufs/host/ufs-mediatek-sip.h
@@ -31,11 +31,6 @@ enum ufs_mtk_vcc_num {
 	UFS_VCC_MAX
 };
 
-enum ufs_mtk_mphy_op {
-	UFS_MPHY_BACKUP = 0,
-	UFS_MPHY_RESTORE
-};
-
 /*
  * SMC call wrapper function
  */
@@ -84,9 +79,6 @@ static inline void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
 #define ufs_mtk_device_pwr_ctrl(on, ufs_version, res) \
 	ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_version)
 
-#define ufs_mtk_mphy_ctrl(op, res) \
-	ufs_mtk_smc(UFS_MTK_SIP_MPHY_CTRL, &(res), op)
-
 #define ufs_mtk_mtcmos_ctrl(op, res) \
 	ufs_mtk_smc(UFS_MTK_SIP_MTCMOS_CTRL, &(res), op)
 
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 66b11cc0703b..5cf5f4c94b8f 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -93,6 +93,12 @@ static const char *const ufs_uic_dl_err_str[] = {
 	"PA_INIT"
 };
 
+static const char *const ufs_reset_names[] = {
+	"unipro",
+	"crypto",
+	"hci",
+};
+
 static bool ufs_mtk_is_boost_crypt_enabled(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -203,49 +209,45 @@ static void ufs_mtk_crypto_enable(struct ufs_hba *hba)
 static void ufs_mtk_host_reset(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
-	struct arm_smccc_res res;
-
-	reset_control_assert(host->hci_reset);
-	reset_control_assert(host->crypto_reset);
-	reset_control_assert(host->unipro_reset);
-	reset_control_assert(host->mphy_reset);
-
-	usleep_range(100, 110);
+	int ret;
 
-	reset_control_deassert(host->unipro_reset);
-	reset_control_deassert(host->crypto_reset);
-	reset_control_deassert(host->hci_reset);
-	reset_control_deassert(host->mphy_reset);
+	ret = reset_control_bulk_assert(MTK_UFS_NUM_RESETS, host->resets);
+	if (ret)
+		dev_warn(hba->dev, "Host reset assert failed: %pe\n", ERR_PTR(ret));
 
-	/* restore mphy setting aftre mphy reset */
-	if (host->mphy_reset)
-		ufs_mtk_mphy_ctrl(UFS_MPHY_RESTORE, res);
-}
+	ret = phy_reset(host->mphy);
 
-static void ufs_mtk_init_reset_control(struct ufs_hba *hba,
-				       struct reset_control **rc,
-				       char *str)
-{
-	*rc = devm_reset_control_get(hba->dev, str);
-	if (IS_ERR(*rc)) {
-		dev_info(hba->dev, "Failed to get reset control %s: %ld\n",
-			 str, PTR_ERR(*rc));
-		*rc = NULL;
+	/*
+	 * Only sleep if MPHY doesn't have a reset implemented (which already
+	 * sleeps) or the PHY reset function failed somehow, just to be safe
+	 */
+	if (ret) {
+		usleep_range(100, 110);
+		if (ret != -EOPNOTSUPP)
+			dev_warn(hba->dev, "PHY reset failed: %pe\n", ERR_PTR(ret));
 	}
+
+	ret = reset_control_bulk_deassert(MTK_UFS_NUM_RESETS, host->resets);
+	if (ret)
+		dev_warn(hba->dev, "Host reset deassert failed: %pe\n", ERR_PTR(ret));
 }
 
-static void ufs_mtk_init_reset(struct ufs_hba *hba)
+static int ufs_mtk_init_reset(struct ufs_hba *hba)
 {
 	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+	int ret, i;
+
+	for (i = 0; i < MTK_UFS_NUM_RESETS; i++)
+		host->resets[i].id = ufs_reset_names[i];
 
-	ufs_mtk_init_reset_control(hba, &host->hci_reset,
-				   "hci_rst");
-	ufs_mtk_init_reset_control(hba, &host->unipro_reset,
-				   "unipro_rst");
-	ufs_mtk_init_reset_control(hba, &host->crypto_reset,
-				   "crypto_rst");
-	ufs_mtk_init_reset_control(hba, &host->mphy_reset,
-				   "mphy_rst");
+	ret = devm_reset_control_bulk_get_optional_exclusive(hba->dev, MTK_UFS_NUM_RESETS,
+							     host->resets);
+	if (ret) {
+		dev_err(hba->dev, "Failed to get resets: %pe\n", ERR_PTR(ret));
+		return ret;
+	}
+
+	return 0;
 }
 
 static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
@@ -1247,11 +1249,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
 	if (err)
 		goto out_variant_clear;
 
-	ufs_mtk_init_reset(hba);
-
-	/* backup mphy setting if mphy can reset */
-	if (host->mphy_reset)
-		ufs_mtk_mphy_ctrl(UFS_MPHY_BACKUP, res);
+	err = ufs_mtk_init_reset(hba);
+	if (err)
+		goto out_variant_clear;
 
 	/* Enable runtime autosuspend */
 	hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 9747277f11e8..4fce29d131d1 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -7,12 +7,14 @@
 #define _UFS_MEDIATEK_H
 
 #include <linux/bitops.h>
+#include <linux/reset.h>
 
 /*
  * MCQ define and struct
  */
 #define UFSHCD_MAX_Q_NR 8
 #define MTK_MCQ_INVALID_IRQ	0xFFFF
+#define MTK_UFS_NUM_RESETS 3
 
 /* REG_UFS_MMIO_OPT_CTRL_0 160h */
 #define EHS_EN                  BIT(0)
@@ -175,10 +177,7 @@ struct ufs_mtk_mcq_intr_info {
 struct ufs_mtk_host {
 	struct phy *mphy;
 	struct regulator *reg_va09;
-	struct reset_control *hci_reset;
-	struct reset_control *unipro_reset;
-	struct reset_control *crypto_reset;
-	struct reset_control *mphy_reset;
+	struct reset_control_bulk_data resets[MTK_UFS_NUM_RESETS];
 	struct ufs_hba *hba;
 	struct ufs_mtk_crypt_cfg *crypt;
 	struct ufs_mtk_clk mclk;

-- 
2.52.0


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* [PATCH v5 05/24] phy: mediatek: ufs: Add support for resets
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

The MediaTek UFS PHY supports PHY resets. Until now, they've been
implemented in the UFS host driver. Since they were never documented in
the UFS HCI node's DT bindings, and no mainline DT uses it, it's fine if
it's moved to the correct location, which is the PHY driver.

Implement the MPHY reset logic in this driver and expose it through the
phy subsystem's reset op. The reset itself is optional, as judging by
other mainline devices that use this hardware, it's not required for the
device to function.

If no reset is present, the reset op returns -EOPNOTSUPP, which means
that the ufshci driver can detect it's present and not double sleep in
its own reset function, where it will call the phy reset.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/phy/mediatek/phy-mtk-ufs.c | 71 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)

diff --git a/drivers/phy/mediatek/phy-mtk-ufs.c b/drivers/phy/mediatek/phy-mtk-ufs.c
index 0cb5a25b1b7a..48f8e4dbf928 100644
--- a/drivers/phy/mediatek/phy-mtk-ufs.c
+++ b/drivers/phy/mediatek/phy-mtk-ufs.c
@@ -4,6 +4,7 @@
  * Author: Stanley Chu <stanley.chu@mediatek.com>
  */
 
+#include <linux/arm-smccc.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
@@ -11,6 +12,8 @@
 #include <linux/module.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/soc/mediatek/mtk_sip_svc.h>
 
 #include "phy-mtk-io.h"
 
@@ -36,9 +39,17 @@
 
 #define UFSPHY_CLKS_CNT    2
 
+#define UFS_MTK_SIP_MPHY_CTRL       BIT(8)
+
+enum ufs_mtk_mphy_op {
+	UFS_MPHY_BACKUP = 0,
+	UFS_MPHY_RESTORE
+};
+
 struct ufs_mtk_phy {
 	struct device *dev;
 	void __iomem *mmio;
+	struct reset_control *reset;
 	struct clk_bulk_data clks[UFSPHY_CLKS_CNT];
 };
 
@@ -141,9 +152,59 @@ static int ufs_mtk_phy_power_off(struct phy *generic_phy)
 	return 0;
 }
 
+static int ufs_mtk_phy_ctrl(struct ufs_mtk_phy *phy, enum ufs_mtk_mphy_op op)
+{
+	struct arm_smccc_res res;
+
+	arm_smccc_smc(MTK_SIP_UFS_CONTROL, UFS_MTK_SIP_MPHY_CTRL, op,
+		      0, 0, 0, 0, 0, &res);
+
+	switch (res.a0) {
+	case SMCCC_RET_NOT_SUPPORTED:
+		return -EOPNOTSUPP;
+	case SMCCC_RET_INVALID_PARAMETER:
+		return -EINVAL;
+	default:
+		return 0;
+	}
+}
+
+static int ufs_mtk_phy_reset(struct phy *generic_phy)
+{
+	struct ufs_mtk_phy *phy = get_ufs_mtk_phy(generic_phy);
+	int ret;
+
+	if (!phy->reset)
+		return -EOPNOTSUPP;
+
+	ret = reset_control_assert(phy->reset);
+	if (ret)
+		return ret;
+
+	usleep_range(100, 110);
+
+	ret = reset_control_deassert(phy->reset);
+	if (ret)
+		return ret;
+
+	/*
+	 * To avoid double-sleep and other unintended side-effects in the ufshci
+	 * driver, don't return the phy_ctrl retval here, but just return -EPROTO.
+	 */
+	ret = ufs_mtk_phy_ctrl(phy, UFS_MPHY_RESTORE);
+	if (ret) {
+		dev_err(phy->dev, "UFS_MPHY_RESTORE SMC command failed: %pe\n",
+			ERR_PTR(ret));
+		return -EPROTO;
+	}
+
+	return 0;
+}
+
 static const struct phy_ops ufs_mtk_phy_ops = {
 	.power_on       = ufs_mtk_phy_power_on,
 	.power_off      = ufs_mtk_phy_power_off,
+	.reset          = ufs_mtk_phy_reset,
 	.owner          = THIS_MODULE,
 };
 
@@ -163,8 +224,18 @@ static int ufs_mtk_phy_probe(struct platform_device *pdev)
 	if (IS_ERR(phy->mmio))
 		return PTR_ERR(phy->mmio);
 
+	phy->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
+	if (IS_ERR(phy->reset))
+		return dev_err_probe(dev, PTR_ERR(phy->reset), "Failed to get reset\n");
+
 	phy->dev = dev;
 
+	if (phy->reset) {
+		ret = ufs_mtk_phy_ctrl(phy, UFS_MPHY_BACKUP);
+		if (ret)
+			return dev_err_probe(dev, ret, "Failed to back up MPHY\n");
+	}
+
 	ret = ufs_mtk_phy_clk_init(phy);
 	if (ret)
 		return ret;

-- 
2.52.0


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* [PATCH v5 03/24] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli,
	Conor Dooley
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

The MediaTek MT8196 SoC's UFS controller uses three additional clocks
compared to the MT8195, and a different set of supplies. It is therefore
not compatible with the MT8195.

While it does have a AVDD09_UFS_1 pin in addition to the AVDD09_UFS pin,
it appears that these two pins are commoned together, as the board
schematic I have access to uses the same supply for both, and the
downstream driver does not distinguish between the two supplies either.

Add a compatible for it, and modify the binding correspondingly.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 .../devicetree/bindings/ufs/mediatek,ufs.yaml      | 58 +++++++++++++++++++++-
 1 file changed, 57 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index e0aef3e5f56b..a82119ecbfe8 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -16,10 +16,11 @@ properties:
       - mediatek,mt8183-ufshci
       - mediatek,mt8192-ufshci
       - mediatek,mt8195-ufshci
+      - mediatek,mt8196-ufshci
 
   clocks:
     minItems: 1
-    maxItems: 13
+    maxItems: 16
 
   clock-names:
     minItems: 1
@@ -37,6 +38,9 @@ properties:
       - const: crypt_perf
       - const: ufs_rx_symbol0
       - const: ufs_rx_symbol1
+      - const: ufs_sel
+      - const: ufs_sel_min_src
+      - const: ufs_sel_max_src
 
   operating-points-v2: true
 
@@ -131,9 +135,27 @@ allOf:
       properties:
         clocks:
           minItems: 13
+          maxItems: 13
         clock-names:
           minItems: 13
+          maxItems: 13
         avdd09-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8196-ufshci
+    then:
+      properties:
+        clocks:
+          minItems: 16
+          maxItems: 16
+        clock-names:
+          minItems: 16
+          maxItems: 16
+        avdd18-supply: false
+      required:
+        - operating-points-v2
 
 examples:
   - |
@@ -183,3 +205,37 @@ examples:
 
         mediatek,ufs-disable-mcq;
     };
+  - |
+    #include <dt-bindings/reset/mediatek,mt8196-resets.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    ufshci@16810000 {
+        compatible = "mediatek,mt8196-ufshci";
+        reg = <0x16810000 0x2a00>;
+        interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+
+        clocks = <&ufs_ao_clk 6>, <&ufs_ao_clk 7>, <&clk26m>, <&ufs_ao_clk 3>,
+                 <&clk26m>, <&ufs_ao_clk 4>, <&ufs_ao_clk 0>,
+                 <&topckgen 7>, <&topckgen 41>, <&topckgen 105>, <&topckgen 83>,
+                 <&ufs_ao_clk 1>, <&ufs_ao_clk 2>, <&topckgen 42>,
+                 <&topckgen 84>, <&topckgen 102>;
+        clock-names = "ufs", "ufs_aes", "ufs_tick", "unipro_sysclk",
+                      "unipro_tick", "unipro_mp_bclk", "ufs_tx_symbol",
+                      "ufs_mem_sub", "crypt_mux", "crypt_lp", "crypt_perf",
+                      "ufs_rx_symbol0", "ufs_rx_symbol1", "ufs_sel",
+                      "ufs_sel_min_src", "ufs_sel_max_src";
+
+        operating-points-v2 = <&ufs_opp_table>;
+
+        phys = <&ufsphy>;
+
+        avdd09-supply = <&mt6363_vsram_modem>;
+        vcc-supply = <&mt6363_vemc>;
+        vccq-supply = <&mt6363_vufs12>;
+
+        resets = <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_UNIPRO>,
+                 <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_CRYPTO>,
+                 <&ufs_ao_clk MT8196_UFSAO_RST1_UFSHCI>;
+        reset-names = "unipro", "crypto", "hci";
+        mediatek,ufs-disable-mcq;
+    };

-- 
2.52.0


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* [PATCH v5 04/24] scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

SMC commands used by multiple drivers need to live in a shared header
file somewhere to avoid code duplication. In order to rework the MPHY
reset control to be in the phy-mtk-ufs.c driver, both ufs-mediatek and
the phy driver need access to this command.

Move it to mtk_sip_svc.h, where other such command definitions already
live.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 drivers/ufs/host/ufs-mediatek-sip.h      | 1 -
 include/linux/soc/mediatek/mtk_sip_svc.h | 3 +++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/host/ufs-mediatek-sip.h b/drivers/ufs/host/ufs-mediatek-sip.h
index 7d17aedf6fb8..d627dfb4a766 100644
--- a/drivers/ufs/host/ufs-mediatek-sip.h
+++ b/drivers/ufs/host/ufs-mediatek-sip.h
@@ -11,7 +11,6 @@
 /*
  * SiP (Slicon Partner) commands
  */
-#define MTK_SIP_UFS_CONTROL               MTK_SIP_SMC_CMD(0x276)
 #define UFS_MTK_SIP_VA09_PWR_CTRL         BIT(0)
 #define UFS_MTK_SIP_DEVICE_RESET          BIT(1)
 #define UFS_MTK_SIP_CRYPTO_CTRL           BIT(2)
diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h
index abe24a73ee19..7265ff2a6e2a 100644
--- a/include/linux/soc/mediatek/mtk_sip_svc.h
+++ b/include/linux/soc/mediatek/mtk_sip_svc.h
@@ -22,6 +22,9 @@
 	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \
 			   ARM_SMCCC_OWNER_SIP, fn_id)
 
+/* UFS related SMC call */
+#define MTK_SIP_UFS_CONTROL		MTK_SIP_SMC_CMD(0x276)
+
 /* DVFSRC SMC calls */
 #define MTK_SIP_DVFSRC_VCOREFS_CONTROL	MTK_SIP_SMC_CMD(0x506)
 

-- 
2.52.0


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* [PATCH v5 02/24] dt-bindings: ufs: mediatek,ufs: Complete the binding
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli,
	Conor Dooley
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

As it stands, the mediatek,ufs.yaml binding is startlingly incomplete.
Its one example, which is the only real "user" of this binding in
mainline, uses the deprecated freq-table-hz property.

The resets, of which there are three optional ones, are completely
absent.

The clock description for MT8195 is incomplete, as is the one for
MT8192. It's not known if the one clock binding for MT8183 is even
correct, but I do not have access to the necessary code and
documentation to find this out myself.

The power supply situation is not much better; the binding describes one
required power supply, but it's the UFS card supply, not any of the
supplies feeding the controller silicon.

No second example is present in the binding, making verification
difficult.

Disallow freq-table-hz and move to operating-points-v2. It's fine to
break compatibility here, as the binding is currently unused and would
be impossible to correctly use in its current state.

Add the three resets and the corresponding reset-names property. These
resets appear to be optional, i.e. not required for the functioning of
the device.

Move the list of clock names out of the if condition, and expand it for
the confirmed clocks I could find by cross-referencing several clock
drivers. For MT8195, increase the minimum number of clocks to include
the crypt and rx_symbol ones, as they're internal to the SoC and should
always be present, and should therefore not be omitted.

MT8192 gets to have at least 3 clocks, as these were the ones I could
quickly confirm from a glance at various trees. I can't say this was an
exhaustive search though, but it's better than the current situation.

Properly document all supplies, with which pin name on the SoCs they
supply. Complete the example with them.

Also add a MT8195 example to the binding, using supply labels that I am
pretty sure would be the right ones for e.g. the Radxa NIO 12L.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 .../devicetree/bindings/ufs/mediatek,ufs.yaml      | 117 ++++++++++++++++++---
 1 file changed, 100 insertions(+), 17 deletions(-)

diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 15c347f5e660..e0aef3e5f56b 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -19,11 +19,28 @@ properties:
 
   clocks:
     minItems: 1
-    maxItems: 8
+    maxItems: 13
 
   clock-names:
     minItems: 1
-    maxItems: 8
+    items:
+      - const: ufs
+      - const: ufs_aes
+      - const: ufs_tick
+      - const: unipro_sysclk
+      - const: unipro_tick
+      - const: unipro_mp_bclk
+      - const: ufs_tx_symbol
+      - const: ufs_mem_sub
+      - const: crypt_mux
+      - const: crypt_lp
+      - const: crypt_perf
+      - const: ufs_rx_symbol0
+      - const: ufs_rx_symbol1
+
+  operating-points-v2: true
+
+  freq-table-hz: false
 
   phys:
     maxItems: 1
@@ -31,8 +48,36 @@ properties:
   reg:
     maxItems: 1
 
+  resets:
+    items:
+      - description: reset for the UniPro layer
+      - description: reset for the cryptography engine
+      - description: reset for the host controller
+
+  reset-names:
+    items:
+      - const: unipro
+      - const: crypto
+      - const: hci
+
+  avdd09-supply:
+    description: Phandle to the 0.9V supply powering the AVDD09_UFS pin
+
+  avdd12-supply:
+    description: Phandle to the 1.2V supply powering the AVDD12_UFS pin
+
+  avdd12-ckbuf-supply:
+    description: Phandle to the 1.2V supply powering the AVDD12_CKBUF_UFS pin
+
+  avdd18-supply:
+    description: Phandle to the 1.8V supply powering the AVDD18_UFS pin
+
   vcc-supply: true
 
+  vccq-supply: true
+
+  vccq2-supply: true
+
   mediatek,ufs-disable-mcq:
     $ref: /schemas/types.yaml#/definitions/flag
     description: The mask to disable MCQ (Multi-Circular Queue) for UFS host.
@@ -54,29 +99,41 @@ allOf:
       properties:
         compatible:
           contains:
-            enum:
-              - mediatek,mt8195-ufshci
+            const: mediatek,mt8183-ufshci
     then:
       properties:
         clocks:
-          minItems: 8
+          maxItems: 1
         clock-names:
           items:
             - const: ufs
-            - const: ufs_aes
-            - const: ufs_tick
-            - const: unipro_sysclk
-            - const: unipro_tick
-            - const: unipro_mp_bclk
-            - const: ufs_tx_symbol
-            - const: ufs_mem_sub
-    else:
+        avdd12-ckbuf-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8192-ufshci
+    then:
       properties:
         clocks:
-          maxItems: 1
+          minItems: 3
+          maxItems: 3
+        clocks-names:
+          minItems: 3
+          maxItems: 3
+        avdd09-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8195-ufshci
+    then:
+      properties:
+        clocks:
+          minItems: 13
         clock-names:
-          items:
-            - const: ufs
+          minItems: 13
+        avdd09-supply: false
 
 examples:
   - |
@@ -95,8 +152,34 @@ examples:
 
             clocks = <&infracfg_ao CLK_INFRA_UFS>;
             clock-names = "ufs";
-            freq-table-hz = <0 0>;
 
             vcc-supply = <&mt_pmic_vemc_ldo_reg>;
         };
     };
+  - |
+    ufshci@11270000 {
+        compatible = "mediatek,mt8195-ufshci";
+        reg = <0x11270000 0x2300>;
+        interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+        phys = <&ufsphy>;
+        clocks = <&infracfg_ao 63>, <&infracfg_ao 64>, <&infracfg_ao 65>,
+                 <&infracfg_ao 54>, <&infracfg_ao 55>,
+                 <&infracfg_ao 56>, <&infracfg_ao 90>,
+                 <&infracfg_ao 93>, <&topckgen 60>, <&topckgen 152>,
+                 <&topckgen 125>, <&topckgen 212>, <&topckgen 215>;
+        clock-names = "ufs", "ufs_aes", "ufs_tick",
+                      "unipro_sysclk", "unipro_tick",
+                      "unipro_mp_bclk", "ufs_tx_symbol",
+                      "ufs_mem_sub", "crypt_mux", "crypt_lp",
+                      "crypt_perf", "ufs_rx_symbol0", "ufs_rx_symbol1";
+
+        operating-points-v2 = <&ufs_opp_table>;
+
+        avdd12-supply = <&mt6359_vrf12_ldo_reg>;
+        avdd12-ckbuf-supply = <&mt6359_vbbck_ldo_reg>;
+        avdd18-supply = <&mt6359_vio18_ldo_reg>;
+        vcc-supply = <&mt6359_vemc_1_ldo_reg>;
+        vccq2-supply = <&mt6359_vufs_ldo_reg>;
+
+        mediatek,ufs-disable-mcq;
+    };

-- 
2.52.0


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* [PATCH v5 01/24] dt-bindings: phy: Add mediatek,mt8196-ufsphy variant
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli,
	Conor Dooley
In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com>

The MediaTek MT8196 SoC includes an M-PHY compatible with the already
existing mt8183 binding.

However, one omission from the original binding was that all of these
variants may have an optional reset.

Add the new compatible, and also the resets property, with an example.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
 .../devicetree/bindings/phy/mediatek,ufs-phy.yaml        | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
index 6e2edd43fc2a..ee71dfa4e0c0 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
@@ -27,6 +27,7 @@ properties:
       - items:
           - enum:
               - mediatek,mt8195-ufsphy
+              - mediatek,mt8196-ufsphy
           - const: mediatek,mt8183-ufsphy
       - const: mediatek,mt8183-ufsphy
 
@@ -43,6 +44,10 @@ properties:
       - const: unipro
       - const: mp
 
+  resets:
+    items:
+      - description: Optional UFS M-PHY reset.
+
   "#phy-cells":
     const: 0
 
@@ -66,5 +71,16 @@ examples:
         clock-names = "unipro", "mp";
         #phy-cells = <0>;
     };
+  - |
+    #include <dt-bindings/reset/mediatek,mt8196-resets.h>
+    ufs-phy@16800000 {
+        compatible = "mediatek,mt8196-ufsphy", "mediatek,mt8183-ufsphy";
+        reg = <0x16800000 0x10000>;
+        clocks = <&ufs_ao_clk 3>,
+                 <&ufs_ao_clk 5>;
+        clock-names = "unipro", "mp";
+        resets = <&ufs_ao_clk MT8196_UFSAO_RST0_UFS_MPHY>;
+        #phy-cells = <0>;
+    };
 
 ...

-- 
2.52.0


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* [PATCH v5 00/24] MediaTek UFS Cleanup and MT8196 Enablement
From: Nicolas Frattaroli @ 2026-01-08 10:49 UTC (permalink / raw)
  To: Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley, Matthias Brugger,
	AngeloGioacchino Del Regno, Chunfeng Yun, Vinod Koul,
	Kishon Vijay Abraham I, Peter Wang, Stanley Jhu,
	James E.J. Bottomley, Martin K. Petersen, Philipp Zabel,
	Liam Girdwood, Mark Brown, Chaotian Jing, Neil Armstrong
  Cc: Louis-Alexis Eyraud, kernel, linux-scsi, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-phy, Nicolas Frattaroli,
	Conor Dooley

In this series, the existing MediaTek UFS binding is expanded and
completed to correctly describe not just the existing compatibles, but
also to introduce a new compatible in the from of the MT8196 SoC.

The resets, which until now were completely absent from both the UFS
host controller binding and the UFS PHY binding, are introduced to both.
This also means the driver's undocumented and, in mainline, unused reset
logic is reworked. In particular, the PHY reset is no longer a reset of
the host controller node, but of the PHY node.

This means the host controller can reset the PHY through the common PHY
framework.

The resets remain optional.

Additionally, a massive number of driver cleanups are introduced. These
were prompted by me inspecting the driver more closely as I was
adjusting it to correspond to the binding.

The driver still implements vendor properties that are undocumented in
the binding. I did not touch most of those, as I neither want to
convince the bindings maintainers that they are needed without knowing
precisely what they're for, nor do I want to argue with the driver
authors when removing them.

Due to the "Marie Kondo with a chainsaw" nature of the driver cleanup
patches, I humbly request that reviewers do not comment on displeasing
code they see in the context portion of a patch before they've read the
whole patch series, as that displeasing code may in fact be reworked in
a subsequent patch of this series. Please keep comments focused on the
changed lines of the diff; I know there's more that can be done, but it
doesn't necessarily need to be part of this series.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
Changes in v5:
- Drop "scsi: ufs: mediatek: Make scale_us in setup_clk_gating const" as
  someone else already got a patch in for this into next.
- Make mtk_init_boost_crypt void
- Don't disable/enable misc regulators during suspend/resume, but enable
  them once when acquiring with a devm helper.
- Link to v4: https://lore.kernel.org/r/20251218-mt8196-ufs-v4-0-ddec7a369dd2@collabora.com

Changes in v4:
- bindings: Redo the supply situation, as the avdd pins don't describe
  the vcc(q2) card supplies.
- bindings: format clock in mt8196 example more tersely.
- phy: use devm_reset_control_get_optional_exclusive directly
- driver: get and enable/disable the aforementioned avdd supplies.
- Link to v3: https://lore.kernel.org/r/20251023-mt8196-ufs-v3-0-0f04b4a795ff@collabora.com

Changes in v3:
- Split mediatek,ufs bindings change into two patches, one for
  completing the existing binding, one for the MT8196
- Add over a dozen driver cleanup patches
- Add explicit support for the MT8196 compatible to the driver
- Note: next-20251023, on which I based this, currently has a broken
  build due to an unrelated OPP core change that was merged with no
  build testing. I can't use next-20251022 either, as that lacks the
  recent mediatek UFS changes. It is what it is.
- Link to v2: https://lore.kernel.org/r/20251016-mt8196-ufs-v2-0-c373834c4e7a@collabora.com

Changes in v2:
- Reorder define in mtk_sip_svc.h
- Use bulk reset APIs in UFS host driver
- Link to v1: https://lore.kernel.org/r/20251014-mt8196-ufs-v1-0-195dceb83bc8@collabora.com

---
Nicolas Frattaroli (24):
      dt-bindings: phy: Add mediatek,mt8196-ufsphy variant
      dt-bindings: ufs: mediatek,ufs: Complete the binding
      dt-bindings: ufs: mediatek,ufs: Add mt8196 variant
      scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h
      phy: mediatek: ufs: Add support for resets
      scsi: ufs: mediatek: Rework resets
      scsi: ufs: mediatek: Rework 0.9V regulator
      scsi: ufs: mediatek: Rework init function
      scsi: ufs: mediatek: Rework the crypt-boost stuff
      scsi: ufs: mediatek: Handle misc host voltage regulators
      scsi: ufs: mediatek: Rework probe function
      scsi: ufs: mediatek: Remove vendor kernel quirks cruft
      scsi: ufs: mediatek: Use the common PHY framework
      scsi: ufs: mediatek: Switch to newer PM ops helpers
      scsi: ufs: mediatek: Remove mediatek,ufs-broken-rtc property
      scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths
      scsi: ufs: mediatek: Add vendor prefix to clk-scale-up-vcore-min
      scsi: ufs: mediatek: Clean up logging prints
      scsi: ufs: mediatek: Rework ufs_mtk_wait_idle_state
      scsi: ufs: mediatek: Don't acquire dvfsrc-vcore twice
      scsi: ufs: mediatek: Rework hardware version reading
      scsi: ufs: mediatek: Back up idle timer in per-instance struct
      scsi: ufs: mediatek: Remove ret local from link_startup_notify
      scsi: ufs: mediatek: Add MT8196 compatible, update copyright

 .../devicetree/bindings/phy/mediatek,ufs-phy.yaml  |  16 +
 .../devicetree/bindings/ufs/mediatek,ufs.yaml      | 173 +++-
 drivers/phy/mediatek/phy-mtk-ufs.c                 |  71 ++
 drivers/ufs/host/ufs-mediatek-sip.h                |   9 -
 drivers/ufs/host/ufs-mediatek.c                    | 966 +++++++++------------
 drivers/ufs/host/ufs-mediatek.h                    |  17 +-
 include/linux/soc/mediatek/mtk_sip_svc.h           |   3 +
 7 files changed, 661 insertions(+), 594 deletions(-)
---
base-commit: beff4beeeb2760405ad49de2a6a1bdab8fb1aec3
change-id: 20251014-mt8196-ufs-cec4b9a97e53

Best regards,
-- 
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>


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* Re: [PATCH v4 12/25] scsi: ufs: mediatek: Remove vendor kernel quirks cruft
From: Nicolas Frattaroli @ 2026-01-08  9:28 UTC (permalink / raw)
  To: chu.stanley@gmail.com, robh@kernel.org,
	Chunfeng Yun (云春峰), kishon@kernel.org,
	James.Bottomley@HansenPartnership.com, bvanassche@acm.org,
	AngeloGioacchino Del Regno, neil.armstrong@linaro.org,
	conor+dt@kernel.org, Chaotian Jing (井朝天),
	lgirdwood@gmail.com, vkoul@kernel.org, krzk+dt@kernel.org,
	p.zabel@pengutronix.de, alim.akhtar@samsung.com,
	matthias.bgg@gmail.com, avri.altman@wdc.com,
	martin.petersen@oracle.com, broonie@kernel.org,
	Peter Wang (王信友)
  Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-phy@lists.infradead.org, linux-mediatek@lists.infradead.org,
	Louis-Alexis Eyraud, kernel@collabora.com
In-Reply-To: <1bbc263bafe14343b2d60a230ae6ce5dadffbf7c.camel@mediatek.com>

On Tuesday, 6 January 2026 14:25:22 Central European Standard Time Peter Wang (王信友) wrote:
> On Thu, 2025-12-18 at 13:55 +0100, Nicolas Frattaroli wrote:
> > 
> > Both ufs_mtk_vreg_fix_vcc and ufs_mtk_vreg_fix_vccqx look like they
> > are
> > vendor kernel hacks to work around existing downstream device trees.
> > Mainline does not need or want them, so remove them.
> > 
> 
> Hi Nicolas,
> 
> This is a flexible approach to implement one software supporting
> multiple
> hardware configurations. Because you cannot guarantee that your SOC
> will 
> always use UFS 2.0 or UFS 3.0, or that the PMIC you use will only have
> one set.

By "one software supporting multiple hardware configurations", do you
mean one device tree? Because if so, I don't think that's a good idea.
Device tree is meant to describe non-enumerable hardware.

Even if you want to make it easier for your customers to ship one image
for several SKUs, there's better ways to do this than having drivers
fix up individual DT nodes. The platform firmware like u-boot can choose
a DT based on differences it can probe. E.g. on Radxa ROCK 5B/5B+ boards,
we have u-boot choose between the 5B and 5B+ DT based on whether LPDDR5
is present, as 5B does not have LPDDR5, so as long as u-boot is told it's
either a ROCK 5B or ROCK 5B+, it can figure out which one specifically based
on that. Similarly, for whichever boards this is for, there may be
differences that can be probed to disambiguate between several SKUs of the
board as long as it's known it must be at least one of those SKUs.

> 
> Thanks
> Peter
> 
> 
> 





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* Re: [PATCH v4 11/25] scsi: ufs: mediatek: Rework probe function
From: Nicolas Frattaroli @ 2026-01-08  9:14 UTC (permalink / raw)
  To: chu.stanley@gmail.com, robh@kernel.org,
	Chunfeng Yun (云春峰), kishon@kernel.org,
	James.Bottomley@HansenPartnership.com, bvanassche@acm.org,
	AngeloGioacchino Del Regno, neil.armstrong@linaro.org,
	conor+dt@kernel.org, Chaotian Jing (井朝天),
	lgirdwood@gmail.com, vkoul@kernel.org, krzk+dt@kernel.org,
	p.zabel@pengutronix.de, alim.akhtar@samsung.com,
	matthias.bgg@gmail.com, avri.altman@wdc.com,
	martin.petersen@oracle.com, broonie@kernel.org,
	Peter Wang (王信友)
  Cc: linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-phy@lists.infradead.org, linux-mediatek@lists.infradead.org,
	Louis-Alexis Eyraud, kernel@collabora.com
In-Reply-To: <213d3077835fc86d15579c0a0a91f64fd84b1059.camel@mediatek.com>

On Tuesday, 6 January 2026 14:23:58 Central European Standard Time Peter Wang (王信友) wrote:
> On Thu, 2025-12-18 at 13:55 +0100, Nicolas Frattaroli wrote:
> > 
> > Remove the ti,syscon-reset cruft.
> > 
> 
> Hi Nicolas,
> 
> Why do we need to remove the reset node? If an error occurs and the
> host 
> does not perform a reset, it could lead to error recovery failure.

Because it's not described by the binding, and appears to be a
downstream hack to work around not having the reset controller
properly described and referred to with a `resets` property.

Even if you were to use `ti,syscon-reset` to describe a reset
controller, the UFS controller driver should not be searching
for this compatible. It should access the reset through the
reset API. The common reset code can then take care of probe
ordering without every driver reinventing it.

> 
> Thanks.
> Peter
> 





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* Re: [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Krzysztof Kozlowski @ 2026-01-08  8:51 UTC (permalink / raw)
  To: Krishna Kurapati
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul, linux-arm-msm, devicetree, linux-kernel, linux-phy,
	Ronak Raheja, Jingyi Wang
In-Reply-To: <20260108052459.1819970-3-krishna.kurapati@oss.qualcomm.com>

On Thu, Jan 08, 2026 at 10:54:59AM +0530, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> 
> Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
> fallback to indicate the compatibility of the M31 eUSB2 PHY on the
> Kaanapali with that on the SM8750.
> 
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof


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* [PATCH v3] phy: fsl-imx8mq-usb: add debugfs to access control register
From: Xu Yang @ 2026-01-08  8:36 UTC (permalink / raw)
  To: vkoul, neil.armstrong, shawnguo, kernel, festevam, jun.li,
	Frank.Li
  Cc: linux-phy, imx, linux-arm-kernel, linux-kernel

The CR port is a simple 16-bit data/address parallel port that is
provided for on-chip access to the control registers inside the
USB 3.0 femtoPHY[1]. While access to these registers is not required
for normal PHY operation, this interface enables you to access
some of the PHY’s diagnostic features during normal operation or
to override some basic PHY control signals.

3 debugfs files are created to read and write control registers,
all use hexadecimal format:
ctrl_reg_base: the register offset to write, or the start offset
               to read.
ctrl_reg_count: how many continuous registers to be read.
ctrl_reg_value: read to show the continuous registers value from
                the offset in ctrl_reg_base, to ctrl_reg_base
                + ctrl_reg_count - 1, one line for one register.
                when write, override the register at ctrl_reg_base,
                one time can only change one 16bits register.

Link[1]: https://www.synopsys.com/dw/doc.php/phy/usb3.0/femto/phy/x652_usb3_ss14lpp_18_ns/4.07a/dwc_usb3.0_femtophy_ss14lpp_08V18V_x1_databook.pdf
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

---
Changes in v3:
 - add documentation link of registers
Changes in v2:
 - correct copyright
 - add imx8mq_phy_wait_for_cr_ack() helper and use it
 - use DEFINE_SHOW_STORE_ATTRIBUTE()
 - directly create debugfs file under imx phy debugfs
 - remove debug_remove_files() since the phy core will handle it
---
 drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 180 ++++++++++++++++++++-
 1 file changed, 178 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
index 95f9264bd0f7..e11054f6673c 100644
--- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
+++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
@@ -1,10 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0+
-/* Copyright (c) 2017 NXP. */
+/* Copyright 2017-2025 NXP. */
 
 #include <linux/bitfield.h>
 #include <linux/clk.h>
+#include <linux/debugfs.h>
 #include <linux/delay.h>
-#include <linux/io.h>
+#include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/phy/phy.h>
@@ -57,6 +58,20 @@
 
 #define PHY_TUNE_DEFAULT		0xffffffff
 
+/* PHY control register access */
+#define PHY_CTRL_REG_OFFSET_MAX		0x201f
+
+#define PHY_CRCTL			0x30
+#define PHY_CRCTL_DATA_IN_MASK		GENMASK(15, 0)
+#define PHY_CRCTL_CAP_ADDR		BIT(16)
+#define PHY_CRCTL_CAP_DATA		BIT(17)
+#define PHY_CRCTL_CR_WRITE		BIT(18)
+#define PHY_CRCTL_CR_READ		BIT(19)
+
+#define PHY_CRSR			0x34
+#define PHY_CRSR_DATA_OUT_MASK		GENMASK(15, 0)
+#define PHY_CRSR_CR_ACK			BIT(16)
+
 #define TCA_CLK_RST			0x00
 #define TCA_CLK_RST_SW			BIT(9)
 #define TCA_CLK_RST_REF_CLK_EN		BIT(1)
@@ -118,6 +133,9 @@ struct imx8mq_usb_phy {
 	void __iomem *base;
 	struct regulator *vbus;
 	struct tca_blk *tca;
+	struct dentry *debugfs;
+	u16 cr_access_base;
+	u16 cr_read_count;
 	u32 pcs_tx_swing_full;
 	u32 pcs_tx_deemph_3p5db;
 	u32 tx_vref_tune;
@@ -411,6 +429,163 @@ static u32 phy_pcs_tx_swing_full_from_property(u32 percent)
 	percent = min(percent, 100U);
 
 	return (percent * 127) / 100;
+};
+
+static int imx8mq_phy_wait_for_cr_ack(struct imx8mq_usb_phy *imx_phy,
+				      u32 stage, u32 *data)
+{
+	void __iomem	*cr_ctrl = imx_phy->base + PHY_CRCTL;
+	void __iomem	*cr_sr = imx_phy->base + PHY_CRSR;
+	u32		val;
+	int		ret;
+
+	writel(readl(cr_ctrl) | stage, cr_ctrl);
+	/* Wait CRSR[16] == 1 */
+	ret = readl_poll_timeout(cr_sr, val,
+				 (val & PHY_CRSR_CR_ACK) == PHY_CRSR_CR_ACK,
+				 1, 100);
+	if (ret)
+		return ret;
+
+	if (stage == PHY_CRCTL_CR_READ)
+		*data = readl(cr_sr) & 0xffff;
+
+	writel(readl(cr_ctrl) & (~stage), cr_ctrl);
+	/* Wait CRSR[16] == 0 */
+	return readl_poll_timeout(cr_sr, val, (val & PHY_CRSR_CR_ACK) == 0, 1, 100);
+}
+
+static int imx8mq_phy_ctrl_reg_addr(struct imx8mq_usb_phy *imx_phy, u16 offset)
+{
+	void __iomem	*cr_ctrl = imx_phy->base + PHY_CRCTL;
+	struct device	*dev = &imx_phy->phy->dev;
+	int		ret;
+
+	writel(offset, cr_ctrl);
+	ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CAP_ADDR, NULL);
+	if (ret < 0) {
+		dev_err(dev, "Failed to address reg 0x%04x\n", offset);
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int imx8mq_phy_ctrl_reg_read(struct imx8mq_usb_phy *imx_phy,
+				    u16 offset, u32 *val)
+{
+	struct device *dev = &imx_phy->phy->dev;
+	int ret;
+
+	if (offset > PHY_CTRL_REG_OFFSET_MAX) {
+		dev_err(dev, "Invalid reg address 0x%04x\n", offset);
+		return -EINVAL;
+	}
+
+	/* Address stage */
+	ret = imx8mq_phy_ctrl_reg_addr(imx_phy, offset);
+	if (ret)
+		return ret;
+
+	/* Read data stage */
+	ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CR_READ, val);
+	if (ret < 0) {
+		dev_err(dev, "Failed to read reg 0x%04x\n", offset);
+		return -EIO;
+	}
+
+	return ret;
+}
+
+static int imx8mq_phy_ctrl_reg_write(struct imx8mq_usb_phy *imx_phy,
+				     u16 offset, u16 val)
+{
+	struct device	*dev = &imx_phy->phy->dev;
+	void __iomem	*cr_ctrl = imx_phy->base + PHY_CRCTL;
+	int		ret;
+
+	if (offset > PHY_CTRL_REG_OFFSET_MAX) {
+		dev_err(dev, "Invalid reg address 0x%04x\n", offset);
+		return -EINVAL;
+	}
+
+	/* Address stage */
+	ret = imx8mq_phy_ctrl_reg_addr(imx_phy, offset);
+	if (ret)
+		return ret;
+
+	/* Capture data stage */
+	writel(val, cr_ctrl);
+	ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CAP_DATA, NULL);
+	if (ret < 0)
+		goto cr_write_err;
+
+	/* Write data stage */
+	ret = imx8mq_phy_wait_for_cr_ack(imx_phy, PHY_CRCTL_CR_WRITE, NULL);
+	if (ret < 0)
+		goto cr_write_err;
+
+	return 0;
+
+cr_write_err:
+	dev_err(dev, "Failed to write reg 0x%04x\n", offset);
+	return -EIO;
+}
+
+static int ctrl_reg_value_show(struct seq_file *s, void *unused)
+{
+	struct imx8mq_usb_phy *imx_phy = s->private;
+	u16 base = imx_phy->cr_access_base;
+	u32 val;
+	int i, ret;
+
+	for (i = 0; i < imx_phy->cr_read_count; i++) {
+		ret = imx8mq_phy_ctrl_reg_read(imx_phy, base + i, &val);
+		if (ret < 0)
+			return ret;
+
+		seq_printf(s, "Control Register 0x%04x value is 0x%04x\n",
+			   base + i, val);
+	}
+
+	return 0;
+}
+
+static ssize_t ctrl_reg_value_write(struct file *file, const char __user *ubuf,
+				    size_t count, loff_t *ppos)
+
+{
+	struct seq_file		*s = file->private_data;
+	struct imx8mq_usb_phy	*imx_phy = s->private;
+	u16			cr_value;
+	int			ret;
+
+	ret = kstrtou16_from_user(ubuf, count, 16, &cr_value);
+	if (ret)
+		return ret;
+
+	ret = imx8mq_phy_ctrl_reg_write(imx_phy, imx_phy->cr_access_base, cr_value);
+	if (ret)
+		return ret;
+
+	return count;
+}
+
+DEFINE_SHOW_STORE_ATTRIBUTE(ctrl_reg_value);
+
+static void imx8m_create_debug_files(struct imx8mq_usb_phy *imx_phy)
+{
+	struct dentry *debugfs = imx_phy->phy->debugfs;
+
+	debugfs_create_x16("ctrl_reg_base", 0600, debugfs,
+			   &imx_phy->cr_access_base);
+	debugfs_create_x16("ctrl_reg_count", 0600, debugfs,
+			   &imx_phy->cr_read_count);
+	debugfs_create_file("ctrl_reg_value", 0600, debugfs,
+			    imx_phy, &ctrl_reg_value_fops);
+
+	imx_phy->cr_access_base = 0;
+	imx_phy->cr_read_count = 1;
 }
 
 static void imx8m_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy)
@@ -731,6 +906,7 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev)
 					"failed to get tca\n");
 
 	imx8m_get_phy_tuning_data(imx_phy);
+	imx8m_create_debug_files(imx_phy);
 
 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 
-- 
2.34.1


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^ permalink raw reply related

* Re: [PATCH v2] phy: fsl-imx8mq-usb: add debugfs to access control register
From: Xu Yang @ 2026-01-08  8:22 UTC (permalink / raw)
  To: Andrew Lunn
  Cc: vkoul, neil.armstrong, shawnguo, kernel, festevam, jun.li,
	Frank.Li, linux-phy, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <9870fd41-bafb-4ab0-91ff-8fcea53ca0a9@lunn.ch>

On Wed, Dec 24, 2025 at 02:51:11PM +0100, Andrew Lunn wrote:
> On Wed, Dec 24, 2025 at 07:17:16PM +0800, Xu Yang wrote:
> > The CR port is a simple 16-bit data/address parallel port that is
> > provided for on-chip access to the control registers inside the
> > USB 3.0 femtoPHY. While access to these registers is not required
> > for normal PHY operation, this interface enables you to access
> > some of the PHY’s diagnostic features during normal operation or
> > to override some basic PHY control signals.
> > 
> > 3 debugfs files are created to read and write control registers,
> > all use hexadecimal format:
> > ctrl_reg_base: the register offset to write, or the start offset
> >                to read.
> > ctrl_reg_count: how many continuous registers to be read.
> > ctrl_reg_value: read to show the continuous registers value from
> >                 the offset in ctrl_reg_base, to ctrl_reg_base
> >                 + ctrl_reg_count - 1, one line for one register.
> >                 when write, override the register at ctrl_reg_base,
> >                 one time can only change one 16bits register.
> 
> Are the registers openly documented somewhere? Could you include a
> link in the commit message.

We integrate a SNPS PHY in Soc. So the registers are documented
in SNPS doc. Anyway, I can add a link for reference.

Thanks,
Xu Yang

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* Re: [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Krishna Kurapati @ 2026-01-08  8:14 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul, linux-arm-msm, devicetree, linux-kernel, linux-phy,
	Ronak Raheja, Jingyi Wang
In-Reply-To: <20260108-congenial-bonobo-of-lightning-5ceaec@quoll>



On 1/8/2026 1:40 PM, Krzysztof Kozlowski wrote:
> On Thu, Jan 08, 2026 at 10:54:59AM +0530, Krishna Kurapati wrote:
>> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>>
>> Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
>> fallback to indicate the compatibility of the M31 eUSB2 PHY on the
>> Kaanapali with that on the SM8750.
>>
>> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> ---
>>   Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> index 409803874c97..cd6b84213a7c 100644
>> --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> @@ -19,6 +19,7 @@ properties:
>>         - items:
>>             - enum:
>>                 - qcom,glymur-m31-eusb2-phy
>> +              - qcom,kaanapali-m31-eusb2-phy
> 
> Huh? So you did not add new compatible? It's exactly the same code, so
> the tag should have stayed. Really, do not overcomplicate things. There
> is no need to poke people on multiple channels to ask them if EXACTLY
> same patch retains the tag. It is already explained in submitting
> patches.
> 
> Keep the previous ack.
> 

Sure, will send v4 retaining the ACK.

Regards,
Krishna,

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* Re: [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Krzysztof Kozlowski @ 2026-01-08  8:10 UTC (permalink / raw)
  To: Krishna Kurapati
  Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul, linux-arm-msm, devicetree, linux-kernel, linux-phy,
	Ronak Raheja, Jingyi Wang
In-Reply-To: <20260108052459.1819970-3-krishna.kurapati@oss.qualcomm.com>

On Thu, Jan 08, 2026 at 10:54:59AM +0530, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> 
> Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
> fallback to indicate the compatibility of the M31 eUSB2 PHY on the
> Kaanapali with that on the SM8750.
> 
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> index 409803874c97..cd6b84213a7c 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> @@ -19,6 +19,7 @@ properties:
>        - items:
>            - enum:
>                - qcom,glymur-m31-eusb2-phy
> +              - qcom,kaanapali-m31-eusb2-phy

Huh? So you did not add new compatible? It's exactly the same code, so
the tag should have stayed. Really, do not overcomplicate things. There
is no need to poke people on multiple channels to ask them if EXACTLY
same patch retains the tag. It is already explained in submitting
patches.

Keep the previous ack.

Best regards,
Krzysztof


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* Re: [PATCH v4 2/7] mux: Add helper functions for getting optional and selected mux-state
From: Krzysztof Kozlowski @ 2026-01-08  7:45 UTC (permalink / raw)
  To: Josua Mayer, Ulf Hansson, Rob Herring, Conor Dooley,
	Geert Uytterhoeven, Magnus Damm, Wolfram Sang, Marc Kleine-Budde,
	Vincent Mailhol, Vinod Koul, Kishon Vijay Abraham I, Peter Rosin,
	Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
	Tony Lindgren, Vignesh R, Janusz Krzysztofik, Andi Shyti,
	Neil Armstrong, kernel test robot
  Cc: oe-kbuild-all@lists.linux.dev, Mikhail Anikin, Yazan Shhady,
	Jon Nettleton, linux-mmc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, linux-can@vger.kernel.org,
	linux-phy@lists.infradead.org
In-Reply-To: <3396461.44csPzL39Z@josua-pc>

On 08/01/2026 08:42, Josua Mayer wrote:
> On Wednesday, 31 December 2025 21:18:51 IST kernel test robot wrote:
>> Hi Josua,
>>
>> kernel test robot noticed the following build errors:
>>
>> [auto build test ERROR on 8f0b4cce4481fb22653697cced8d0d04027cb1e8]
>>
>> url:   
>> https://github.com/intel-lab-lkp/linux/commits/Josua-Mayer/phy-can-transcei
>> ver-rename-temporary-helper-function-to-avoid-conflict/20251229-223153 base:
>>   8f0b4cce4481fb22653697cced8d0d04027cb1e8
>> patch link:   
>> https://lore.kernel.org/r/20251229-rz-sdio-mux-v4-2-a023e55758fe%40solid-ru
>> n.com patch subject: [PATCH v4 2/7] mux: Add helper functions for getting
>> optional and selected mux-state config: parisc-randconfig-002-20260101
>> (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp
>> @intel.com/config) compiler: hppa-linux-gcc (GCC) 10.5.0
>> reproduce (this is a W=1 build):
>> (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp
>> @intel.com/reproduce)
>>
>> If you fix the issue in a separate patch/commit (i.e. not just a new version
>> of the same patch/commit), kindly add following tags
>>
>> | Reported-by: kernel test robot <lkp@intel.com>
>> | Closes:
>> | https://lore.kernel.org/oe-kbuild-all/202601010305.tpY47HE4-lkp@intel.com
>> | /
>> All error/warnings (new ones prefixed by >>):
>>
>>    In file included from drivers/mux/core.c:19:
>>
>>    include/linux/mux/consumer.h: In function 'mux_control_put':
>>>> include/linux/mux/consumer.h:138:9: warning: 'return' with a value, in
>>>> function returning void [-Wreturn-type]
>>      138 |  return -EOPNOTSUPP;
>>
>>          |         ^
>>
> To be fixed in next version
> 
>>    include/linux/mux/consumer.h:136:20: note: declared here
>>      136 | static inline void mux_control_put(struct mux_control *mux)
>>
>>          |                    ^~~~~~~~~~~~~~~
>>
>>    drivers/mux/core.c: At top level:
>>>> drivers/mux/core.c:302:14: error: redefinition of 'mux_control_states'
>>
>>      302 | unsigned int mux_control_states(struct mux_control *mux)
>>
>>          |              ^~~~~~~~~~~~~~~~~~
>>
>>    In file included from drivers/mux/core.c:19:
>>    include/linux/mux/consumer.h:70:28: note: previous definition of
>> 'mux_control_states' was here 70 | static inline unsigned int
>> mux_control_states(struct mux_control *mux)
>>          |                            ^~~~~~~~~~~~~~~~~~
> 
> I don't understand how this is possible.
> In the header file line 136 the inline declaration for mux_control_states is 
> gated by ifdef CONFIG_MULTIPLEXER else case.
> 
> The build of mux/core.c itself is gated in Makefile by CONFIG_MULTIPLEXER.
> 
> So mux/core.c is not being built when CONFIG_MULTIPLEXER is not set.
> If it is set, we hit in the header file the non-inline declaration near start
> of the file.


You have all the tools in this email to actually reproduce it. Did you try?

Best regards,
Krzysztof

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* Re: [PATCH v4 2/7] mux: Add helper functions for getting optional and selected mux-state
From: Josua Mayer @ 2026-01-08  7:42 UTC (permalink / raw)
  To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Geert Uytterhoeven, Magnus Damm, Wolfram Sang, Marc Kleine-Budde,
	Vincent Mailhol, Vinod Koul, Kishon Vijay Abraham I, Peter Rosin,
	Aaro Koskinen, Andreas Kemnade, Kevin Hilman, Roger Quadros,
	Tony Lindgren, Vignesh R, Janusz Krzysztofik, Andi Shyti,
	Neil Armstrong, kernel test robot
  Cc: oe-kbuild-all@lists.linux.dev, Mikhail Anikin, Yazan Shhady,
	Jon Nettleton, linux-mmc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, linux-can@vger.kernel.org,
	linux-phy@lists.infradead.org
In-Reply-To: <202601010305.tpY47HE4-lkp@intel.com>

On Wednesday, 31 December 2025 21:18:51 IST kernel test robot wrote:
> Hi Josua,
> 
> kernel test robot noticed the following build errors:
> 
> [auto build test ERROR on 8f0b4cce4481fb22653697cced8d0d04027cb1e8]
> 
> url:   
> https://github.com/intel-lab-lkp/linux/commits/Josua-Mayer/phy-can-transcei
> ver-rename-temporary-helper-function-to-avoid-conflict/20251229-223153 base:
>   8f0b4cce4481fb22653697cced8d0d04027cb1e8
> patch link:   
> https://lore.kernel.org/r/20251229-rz-sdio-mux-v4-2-a023e55758fe%40solid-ru
> n.com patch subject: [PATCH v4 2/7] mux: Add helper functions for getting
> optional and selected mux-state config: parisc-randconfig-002-20260101
> (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp
> @intel.com/config) compiler: hppa-linux-gcc (GCC) 10.5.0
> reproduce (this is a W=1 build):
> (https://download.01.org/0day-ci/archive/20260101/202601010305.tpY47HE4-lkp
> @intel.com/reproduce)
> 
> If you fix the issue in a separate patch/commit (i.e. not just a new version
> of the same patch/commit), kindly add following tags
> 
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes:
> | https://lore.kernel.org/oe-kbuild-all/202601010305.tpY47HE4-lkp@intel.com
> | /
> All error/warnings (new ones prefixed by >>):
> 
>    In file included from drivers/mux/core.c:19:
> 
>    include/linux/mux/consumer.h: In function 'mux_control_put':
> >> include/linux/mux/consumer.h:138:9: warning: 'return' with a value, in
> >> function returning void [-Wreturn-type]
>      138 |  return -EOPNOTSUPP;
> 
>          |         ^
> 
To be fixed in next version

>    include/linux/mux/consumer.h:136:20: note: declared here
>      136 | static inline void mux_control_put(struct mux_control *mux)
> 
>          |                    ^~~~~~~~~~~~~~~
> 
>    drivers/mux/core.c: At top level:
> >> drivers/mux/core.c:302:14: error: redefinition of 'mux_control_states'
> 
>      302 | unsigned int mux_control_states(struct mux_control *mux)
> 
>          |              ^~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:70:28: note: previous definition of
> 'mux_control_states' was here 70 | static inline unsigned int
> mux_control_states(struct mux_control *mux)
>          |                            ^~~~~~~~~~~~~~~~~~

I don't understand how this is possible.
In the header file line 136 the inline declaration for mux_control_states is 
gated by ifdef CONFIG_MULTIPLEXER else case.

The build of mux/core.c itself is gated in Makefile by CONFIG_MULTIPLEXER.

So mux/core.c is not being built when CONFIG_MULTIPLEXER is not set.
If it is set, we hit in the header file the non-inline declaration near start
of the file.

> >> 
> >> drivers/mux/core.c:365:5: error: redefinition of
> >> 'mux_control_select_delay'
> 
>      365 | int mux_control_select_delay(struct mux_control *mux, unsigned
> int state,
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:74:32: note: previous definition of
> 'mux_control_select_delay' was here 74 | static inline int __must_check
> mux_control_select_delay(struct mux_control *mux,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:403:5: error: redefinition of 'mux_state_select_delay'
> 
>      403 | int mux_state_select_delay(struct mux_state *mstate, unsigned int
> delay_us)
>          |     ^~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:79:32: note: previous definition of
> 'mux_state_select_delay' was here 79 | static inline int __must_check
> mux_state_select_delay(struct mux_state *mstate,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:425:5: error: redefinition of
> >> 'mux_control_try_select_delay'
>      425 | int mux_control_try_select_delay(struct mux_control *mux,
> unsigned int state,
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:84:32: note: previous definition of
> 'mux_control_try_select_delay' was here 84 | static inline int __must_check
> mux_control_try_select_delay(struct mux_control *mux,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:459:5: error: redefinition of
> >> 'mux_state_try_select_delay'
>      459 | int mux_state_try_select_delay(struct mux_state *mstate, unsigned
> int delay_us)
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:90:32: note: previous definition of
> 'mux_state_try_select_delay' was here 90 | static inline int __must_check
> mux_state_try_select_delay(struct mux_state *mstate,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:477:5: error: redefinition of 'mux_control_deselect'
> 
>      477 | int mux_control_deselect(struct mux_control *mux)
> 
>          |     ^~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:118:19: note: previous definition of
> 'mux_control_deselect' was here 118 | static inline int
> mux_control_deselect(struct mux_control *mux)
>          |                   ^~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:503:5: error: redefinition of 'mux_state_deselect'
> 
>      503 | int mux_state_deselect(struct mux_state *mstate)
> 
>          |     ^~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:122:19: note: previous definition of
> 'mux_state_deselect' was here 122 | static inline int
> mux_state_deselect(struct mux_state *mstate)
>          |                   ^~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:625:21: error: redefinition of 'mux_control_get'
> 
>      625 | struct mux_control *mux_control_get(struct device *dev, const
> char *mux_name)
>          |                     ^~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:127:35: note: previous definition of
> 'mux_control_get' was here 127 | static inline struct mux_control
> *mux_control_get(struct device *dev, const char *mux_name)
>          |                                   ^~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:638:21: error: redefinition of
> >> 'mux_control_get_optional'
>      638 | struct mux_control *mux_control_get_optional(struct device *dev,
> const char *mux_name)
>          |                     ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:131:35: note: previous definition of
> 'mux_control_get_optional' was here 131 | static inline struct mux_control
> *mux_control_get_optional(struct device *dev,
>          |                                   ^~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:650:6: error: redefinition of 'mux_control_put'
> 
>      650 | void mux_control_put(struct mux_control *mux)
> 
>          |      ^~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:136:20: note: previous definition of
> 'mux_control_put' was here 136 | static inline void mux_control_put(struct
> mux_control *mux)
>          |                    ^~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:671:21: error: redefinition of 'devm_mux_control_get'
> 
>      671 | struct mux_control *devm_mux_control_get(struct device *dev,
> 
>          |                     ^~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:141:35: note: previous definition of
> 'devm_mux_control_get' was here 141 | static inline struct mux_control
> *devm_mux_control_get(struct device *dev, const char *mux_name)
>          |                                   ^~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:774:19: error: redefinition of 'devm_mux_state_get'
> 
>      774 | struct mux_state *devm_mux_state_get(struct device *dev, const
> char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:145:33: note: previous definition of
> 'devm_mux_state_get' was here 145 | static inline struct mux_state
> *devm_mux_state_get(struct device *dev, const char *mux_name)
>          |                                 ^~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:788:19: error: redefinition of
> >> 'devm_mux_state_get_optional'
>      788 | struct mux_state *devm_mux_state_get_optional(struct device *dev,
> const char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:149:33: note: previous definition of
> 'devm_mux_state_get_optional' was here 149 | static inline struct mux_state
> *devm_mux_state_get_optional(struct device *dev,
>          |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:838:19: error: redefinition of
> >> 'devm_mux_state_get_selected'
>      838 | struct mux_state *devm_mux_state_get_selected(struct device *dev,
> const char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:154:33: note: previous definition of
> 'devm_mux_state_get_selected' was here 154 | static inline struct mux_state
> *devm_mux_state_get_selected(struct device *dev,
>          |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> >> 
> >> drivers/mux/core.c:854:19: error: redefinition of
> >> 'devm_mux_state_get_optional_selected'
>      854 | struct mux_state *devm_mux_state_get_optional_selected(struct
> device *dev,
>          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from drivers/mux/core.c:19:
>    include/linux/mux/consumer.h:159:33: note: previous definition of
> 'devm_mux_state_get_optional_selected' was here 159 | static inline struct
> mux_state *devm_mux_state_get_optional_selected(struct device *dev,
>          |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>          |                                 ~~~
> 
> --
>    In file included from core.c:19:
> 
>    include/linux/mux/consumer.h: In function 'mux_control_put':
> >> include/linux/mux/consumer.h:138:9: warning: 'return' with a value, in
> >> function returning void [-Wreturn-type]
>      138 |  return -EOPNOTSUPP;
> 
>          |         ^
> 
>    include/linux/mux/consumer.h:136:20: note: declared here
>      136 | static inline void mux_control_put(struct mux_control *mux)
> 
>          |                    ^~~~~~~~~~~~~~~
> 
>    core.c: At top level:
>    core.c:302:14: error: redefinition of 'mux_control_states'
>      302 | unsigned int mux_control_states(struct mux_control *mux)
> 
>          |              ^~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:70:28: note: previous definition of
> 'mux_control_states' was here 70 | static inline unsigned int
> mux_control_states(struct mux_control *mux)
>          |                            ^~~~~~~~~~~~~~~~~~
> 
>    core.c:365:5: error: redefinition of 'mux_control_select_delay'
>      365 | int mux_control_select_delay(struct mux_control *mux, unsigned
> int state,
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:74:32: note: previous definition of
> 'mux_control_select_delay' was here 74 | static inline int __must_check
> mux_control_select_delay(struct mux_control *mux,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:403:5: error: redefinition of 'mux_state_select_delay'
>      403 | int mux_state_select_delay(struct mux_state *mstate, unsigned int
> delay_us)
>          |     ^~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:79:32: note: previous definition of
> 'mux_state_select_delay' was here 79 | static inline int __must_check
> mux_state_select_delay(struct mux_state *mstate,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:425:5: error: redefinition of 'mux_control_try_select_delay'
>      425 | int mux_control_try_select_delay(struct mux_control *mux,
> unsigned int state,
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:84:32: note: previous definition of
> 'mux_control_try_select_delay' was here 84 | static inline int __must_check
> mux_control_try_select_delay(struct mux_control *mux,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:459:5: error: redefinition of 'mux_state_try_select_delay'
>      459 | int mux_state_try_select_delay(struct mux_state *mstate, unsigned
> int delay_us)
>          |     ^~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:90:32: note: previous definition of
> 'mux_state_try_select_delay' was here 90 | static inline int __must_check
> mux_state_try_select_delay(struct mux_state *mstate,
>          |                                ^~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:477:5: error: redefinition of 'mux_control_deselect'
>      477 | int mux_control_deselect(struct mux_control *mux)
> 
>          |     ^~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:118:19: note: previous definition of
> 'mux_control_deselect' was here 118 | static inline int
> mux_control_deselect(struct mux_control *mux)
>          |                   ^~~~~~~~~~~~~~~~~~~~
> 
>    core.c:503:5: error: redefinition of 'mux_state_deselect'
>      503 | int mux_state_deselect(struct mux_state *mstate)
> 
>          |     ^~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:122:19: note: previous definition of
> 'mux_state_deselect' was here 122 | static inline int
> mux_state_deselect(struct mux_state *mstate)
>          |                   ^~~~~~~~~~~~~~~~~~
> 
>    core.c:625:21: error: redefinition of 'mux_control_get'
>      625 | struct mux_control *mux_control_get(struct device *dev, const
> char *mux_name)
>          |                     ^~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:127:35: note: previous definition of
> 'mux_control_get' was here 127 | static inline struct mux_control
> *mux_control_get(struct device *dev, const char *mux_name)
>          |                                   ^~~~~~~~~~~~~~~
> 
>    core.c:638:21: error: redefinition of 'mux_control_get_optional'
>      638 | struct mux_control *mux_control_get_optional(struct device *dev,
> const char *mux_name)
>          |                     ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:131:35: note: previous definition of
> 'mux_control_get_optional' was here 131 | static inline struct mux_control
> *mux_control_get_optional(struct device *dev,
>          |                                   ^~~~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:650:6: error: redefinition of 'mux_control_put'
>      650 | void mux_control_put(struct mux_control *mux)
> 
>          |      ^~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:136:20: note: previous definition of
> 'mux_control_put' was here 136 | static inline void mux_control_put(struct
> mux_control *mux)
>          |                    ^~~~~~~~~~~~~~~
> 
>    core.c:671:21: error: redefinition of 'devm_mux_control_get'
>      671 | struct mux_control *devm_mux_control_get(struct device *dev,
> 
>          |                     ^~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:141:35: note: previous definition of
> 'devm_mux_control_get' was here 141 | static inline struct mux_control
> *devm_mux_control_get(struct device *dev, const char *mux_name)
>          |                                   ^~~~~~~~~~~~~~~~~~~~
> 
>    core.c:774:19: error: redefinition of 'devm_mux_state_get'
>      774 | struct mux_state *devm_mux_state_get(struct device *dev, const
> char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:145:33: note: previous definition of
> 'devm_mux_state_get' was here 145 | static inline struct mux_state
> *devm_mux_state_get(struct device *dev, const char *mux_name)
>          |                                 ^~~~~~~~~~~~~~~~~~
> 
>    core.c:788:19: error: redefinition of 'devm_mux_state_get_optional'
>      788 | struct mux_state *devm_mux_state_get_optional(struct device *dev,
> const char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    In file included from core.c:19:
>    include/linux/mux/consumer.h:149:33: note: previous definition of
> 'devm_mux_state_get_optional' was here 149 | static inline struct mux_state
> *devm_mux_state_get_optional(struct device *dev,
>          |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
>    core.c:838:19: error: redefinition of 'devm_mux_state_get_selected'
>      838 | struct mux_state *devm_mux_state_get_selected(struct device *dev,
> const char *mux_name)
>          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> vim +/mux_control_states +302 drivers/mux/core.c
> 
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  295
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  296 
> /** a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14 
> 297   * mux_control_states() - Query the number of multiplexer states.
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  298  
> * @mux: The mux-control to query. a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  299   * a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  300   * Return: The
> number of multiplexer states. a3b02a9c6591ce drivers/mux/mux-core.c Peter
> Rosin        2017-05-14  301   */ a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14 @302  unsigned int mux_control_states(struct
> mux_control *mux) a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  303  { a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  304  	return mux->states; a3b02a9c6591ce drivers/mux/mux-
core.c
> Peter Rosin        2017-05-14  305  } a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  306  EXPORT_SYMBOL_GPL(mux_control_states);
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  307
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  308 
> /* a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  309
>   * The mux->lock must be down when calling this function. a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  310   */
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  311 
> static int __mux_control_select(struct mux_control *mux, int state)
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  312  {
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  313 
> 	int ret; a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  314 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  315  	if (WARN_ON(state < 0 || state >= mux->states))
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  316 
> 		return -EINVAL; a3b02a9c6591ce drivers/mux/mux-core.c 
Peter Rosin       
> 2017-05-14  317 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  318  	if (mux->cached_state == state) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  319  		
return 0;
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  320
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  321 
> 	ret = mux_control_set(mux, state); a3b02a9c6591ce drivers/mux/mux-
core.c
> Peter Rosin        2017-05-14  322  	if (ret >= 0) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  323  		
return 0;
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  324
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  325 
> 	/* The mux update failed, try to revert if appropriate... */
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  326 
> 	if (mux->idle_state != MUX_IDLE_AS_IS) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  327 
> 		mux_control_set(mux, mux->idle_state); a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  328 a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  329  	return ret;
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  330  }
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  331
> 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  332 
> static void mux_control_delay(struct mux_control *mux, unsigned int
> delay_us) 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch
> 2021-10-07  333  { 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch
> 2021-10-07  334  	ktime_t delayend; 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  335  	s64 remaining; 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  336 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  337  	if (!
delay_us)
> 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  338 
> 		return; 17b5b576ff5faf drivers/mux/core.c     Vincent 
Whitchurch
> 2021-10-07  339 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch
> 2021-10-07  340  	delayend = ktime_add_us(mux->last_change, delay_us);
> 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  341 
> 	remaining = ktime_us_delta(delayend, ktime_get()); 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  342  	if (remaining 
>
> 0) 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  343
>  		fsleep(remaining); 17b5b576ff5faf drivers/mux/core.c     
Vincent
> Whitchurch 2021-10-07  344  } 17b5b576ff5faf drivers/mux/core.c     Vincent
> Whitchurch 2021-10-07  345 a3b02a9c6591ce drivers/mux/mux-core.c Peter
> Rosin        2017-05-14  346  /** 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  347   * mux_control_select_delay() - Select
> the given multiplexer state. a3b02a9c6591ce drivers/mux/mux-core.c Peter
> Rosin        2017-05-14  348   * @mux: The mux-control to request a change
> of state from. a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  349   * @state: The new requested state. 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  350   * @delay_us:
> The time to delay (in microseconds) if the mux state is changed.
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  351  
> * a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  352 
>  * On successfully selecting the mux-control state, it will be locked until
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  353  
> * there is a call to mux_control_deselect(). If the mux-control is already
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  354  
> * selected when mux_control_select() is called, the caller will be blocked
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  355  
> * until mux_control_deselect() or mux_state_deselect() is called (by
> someone 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07
>  356   * else). a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  357   * a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin      
>  2017-05-14  358   * Therefore, make sure to call mux_control_deselect()
> when the operation is a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin    
>    2017-05-14  359   * complete and the mux-control is free for others to
> use, but do not call a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin     
>   2017-05-14  360   * mux_control_deselect() if mux_control_select() fails.
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  361  
> * a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  362 
>  * Return: 0 when the mux-control state has the requested state or a
> negative a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  363   * errno on error. a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  364   */ 17b5b576ff5faf drivers/mux/core.c  
>   Vincent Whitchurch 2021-10-07 @365  int mux_control_select_delay(struct
> mux_control *mux, unsigned int state, 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  366  			     unsigned int 
delay_us)
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  367  {
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  368 
> 	int ret; a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  369 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  370  	ret = down_killable(&mux->lock); a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  371  	if (ret < 0)
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  372 
> 		return ret; a3b02a9c6591ce drivers/mux/mux-core.c Peter 
Rosin       
> 2017-05-14  373 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  374  	ret = __mux_control_select(mux, state); 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  375  	if (ret >= 0)
> 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  376 
> 		mux_control_delay(mux, delay_us); a3b02a9c6591ce 
drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  377 a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  378  	if (ret < 0) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  379 
> 		up(&mux->lock); a3b02a9c6591ce drivers/mux/mux-core.c 
Peter Rosin       
> 2017-05-14  380 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  381  	return ret; a3b02a9c6591ce drivers/mux/mux-core.c 
Peter
> Rosin        2017-05-14  382  } 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  383 
> EXPORT_SYMBOL_GPL(mux_control_select_delay); a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  384 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  385  /**
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  386  
> * mux_state_select_delay() - Select the given multiplexer state.
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  387  
> * @mstate: The mux-state to select. 84564481bc4520 drivers/mux/core.c    
> Aswath Govindraju  2022-01-07  388   * @delay_us: The time to delay (in
> microseconds) if the mux state is changed. 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  389   *
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  390  
> * On successfully selecting the mux-state, its mux-control will be locked
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  391  
> * until there is a call to mux_state_deselect(). If the mux-control is
> already 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07
>  392   * selected when mux_state_select() is called, the caller will be
> blocked 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07
>  393   * until mux_state_deselect() or mux_control_deselect() is called (by
> someone 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07
>  394   * else). 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  395   * 84564481bc4520 drivers/mux/core.c     Aswath Govindraju
>  2022-01-07  396   * Therefore, make sure to call mux_state_deselect() when
> the operation is 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  397   * complete and the mux-control is free for others to use,
> but do not call 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  398   * mux_state_deselect() if mux_state_select() fails.
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  399  
> * 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  400 
>  * Return: 0 when the mux-state has been selected or a negative
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  401  
> * errno on error. 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  402   */ 84564481bc4520 drivers/mux/core.c     Aswath
> Govindraju  2022-01-07 @403  int mux_state_select_delay(struct mux_state
> *mstate, unsigned int delay_us) 84564481bc4520 drivers/mux/core.c    
> Aswath Govindraju  2022-01-07  404  { 84564481bc4520 drivers/mux/core.c    
> Aswath Govindraju  2022-01-07  405  	return
> mux_control_select_delay(mstate->mux, mstate->state, delay_us);
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  406  }
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  407 
> EXPORT_SYMBOL_GPL(mux_state_select_delay); 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  408 a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  409  /**
> 17b5b576ff5faf drivers/mux/core.c     Vincent Whitchurch 2021-10-07  410  
> * mux_control_try_select_delay() - Try to select the given multiplexer
> state. a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14 
> 411   * @mux: The mux-control to request a change of state from.
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  412  
> * @state: The new requested state. 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  413   * @delay_us: The time to delay (in
> microseconds) if the mux state is changed. a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  414   *
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  415  
> * On successfully selecting the mux-control state, it will be locked until
> f22d1117b9c3e2 drivers/mux/core.c     Peter Rosin        2022-01-07  416  
> * mux_control_deselect() is called. a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  417   * a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  418   * Therefore,
> make sure to call mux_control_deselect() when the operation is
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  419  
> * complete and the mux-control is free for others to use, but do not call
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  420  
> * mux_control_deselect() if mux_control_try_select() fails. a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  421   *
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  422  
> * Return: 0 when the mux-control state has the requested state or a
> negative a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  423   * errno on error. Specifically -EBUSY if the mux-control
> is contended. a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  424   */ 17b5b576ff5faf drivers/mux/core.c     Vincent
> Whitchurch 2021-10-07 @425  int mux_control_try_select_delay(struct
> mux_control *mux, unsigned int state, 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  426  				 
unsigned int delay_us)
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  427  {
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  428 
> 	int ret; a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  429 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  430  	if (down_trylock(&mux->lock)) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  431  		
return -EBUSY;
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  432
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  433 
> 	ret = __mux_control_select(mux, state); 17b5b576ff5faf drivers/mux/
core.c 
>    Vincent Whitchurch 2021-10-07  434  	if (ret >= 0) 17b5b576ff5faf
> drivers/mux/core.c     Vincent Whitchurch 2021-10-07  435 
> 		mux_control_delay(mux, delay_us); a3b02a9c6591ce 
drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  436 a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  437  	if (ret < 0) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  438 
> 		up(&mux->lock); a3b02a9c6591ce drivers/mux/mux-core.c 
Peter Rosin       
> 2017-05-14  439 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  440  	return ret; a3b02a9c6591ce drivers/mux/mux-core.c 
Peter
> Rosin        2017-05-14  441  } 17b5b576ff5faf drivers/mux/core.c    
> Vincent Whitchurch 2021-10-07  442 
> EXPORT_SYMBOL_GPL(mux_control_try_select_delay); a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  443 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  444  /**
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  445  
> * mux_state_try_select_delay() - Try to select the given multiplexer state.
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  446  
> * @mstate: The mux-state to select. 84564481bc4520 drivers/mux/core.c    
> Aswath Govindraju  2022-01-07  447   * @delay_us: The time to delay (in
> microseconds) if the mux state is changed. 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  448   *
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  449  
> * On successfully selecting the mux-state, its mux-control will be locked
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  450  
> * until mux_state_deselect() is called. 84564481bc4520 drivers/mux/core.c  
>   Aswath Govindraju  2022-01-07  451   * 84564481bc4520 drivers/mux/core.c 
>    Aswath Govindraju  2022-01-07  452   * Therefore, make sure to call
> mux_state_deselect() when the operation is 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  453   * complete and
> the mux-control is free for others to use, but do not call 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  454   *
> mux_state_deselect() if mux_state_try_select() fails. 84564481bc4520
> drivers/mux/core.c     Aswath Govindraju  2022-01-07  455   *
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  456  
> * Return: 0 when the mux-state has been selected or a negative errno on
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  457  
> * error. Specifically -EBUSY if the mux-control is contended.
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  458  
> */ 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07 @459
>  int mux_state_try_select_delay(struct mux_state *mstate, unsigned int
> delay_us) 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  460  { 84564481bc4520 drivers/mux/core.c     Aswath Govindraju 
> 2022-01-07  461  	return mux_control_try_select_delay(mstate->mux,
> mstate->state, delay_us); 84564481bc4520 drivers/mux/core.c     Aswath
> Govindraju  2022-01-07  462  } 84564481bc4520 drivers/mux/core.c     Aswath
> Govindraju  2022-01-07  463  EXPORT_SYMBOL_GPL(mux_state_try_select_delay);
> 84564481bc4520 drivers/mux/core.c     Aswath Govindraju  2022-01-07  464
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  465 
> /** a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14 
> 466   * mux_control_deselect() - Deselect the previously selected
> multiplexer state. a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  467   * @mux: The mux-control to deselect. a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  468   *
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  469  
> * It is required that a single call is made to mux_control_deselect() for
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  470  
> * each and every successful call made to either of mux_control_select() or
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  471  
> * mux_control_try_select(). a3b02a9c6591ce drivers/mux/mux-core.c Peter
> Rosin        2017-05-14  472   * a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  473   * Return: 0 on success and a negative
> errno on error. An error can only a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  474   * occur if the mux has an idle state.
> Note that even if an error occurs, the a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  475   * mux-control
> is unlocked and is thus free for the next access. a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  476   */
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14 @477 
> int mux_control_deselect(struct mux_control *mux) a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  478  { a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  479  	int ret = 0;
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  480
> a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin        2017-05-14  481 
> 	if (mux->idle_state != MUX_IDLE_AS_IS && a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  482  	   
> mux->idle_state != mux->cached_state) a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  483  		ret = 
mux_control_set(mux,
> mux->idle_state); a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  484 a3b02a9c6591ce drivers/mux/mux-core.c Peter Rosin       
> 2017-05-14  485  	up(&mux->lock); a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  486 a3b02a9c6591ce drivers/mux/mux-core.c
> Peter Rosin        2017-05-14  487  	return ret; a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  488  } a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  489 
> EXPORT_SYMBOL_GPL(mux_control_deselect); a3b02a9c6591ce
> drivers/mux/mux-core.c Peter Rosin        2017-05-14  490





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* Re: [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Krishna Kurapati @ 2026-01-08  6:45 UTC (permalink / raw)
  To: Jingyi Wang, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, linux-kernel, Rob Herring,
	Conor Dooley, Neil Armstrong, Vinod Koul, linux-phy, Ronak Raheja
In-Reply-To: <d3757e4f-ac9f-40e8-94f1-a8ed68a6d2c1@oss.qualcomm.com>



On 1/8/2026 11:17 AM, Jingyi Wang wrote:
> 
> 
> On 1/8/2026 1:24 PM, Krishna Kurapati wrote:
>> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>>
>> Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
>> fallback to indicate the compatibility of the M31 eUSB2 PHY on the
>> Kaanapali with that on the SM8750.
>>
>> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
>> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> ---
>>   Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> index 409803874c97..cd6b84213a7c 100644
>> --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>> @@ -19,6 +19,7 @@ properties:
>>         - items:
>>             - enum:
>>                 - qcom,glymur-m31-eusb2-phy
>> +              - qcom,kaanapali-m31-eusb2-phy
>>             - const: qcom,sm8750-m31-eusb2-phy
>>         - const: qcom,sm8750-m31-eusb2-phy
>>   
> 
> I think the reviewed-by tag should be reserved as this is patch rebase.
> 

Hi Jingyi,

  I mentioned in cover letter why I didn't add received tag:

"Removed RB tag of Krzysztof on M31 Phy bindings since the changes now 
expand compatibles list that use sm8750 as fallback instead of 
implementing the fallback."

  I can send v4 if the RB tag can be retained. Apologies if I made a 
mistake removing the RB tag.

Regards,
Krishna,

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* Re: [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Jingyi Wang @ 2026-01-08  5:47 UTC (permalink / raw)
  To: Krishna Kurapati, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	Neil Armstrong, Vinod Koul
  Cc: linux-arm-msm, devicetree, linux-kernel, linux-phy, Ronak Raheja
In-Reply-To: <20260108052459.1819970-3-krishna.kurapati@oss.qualcomm.com>



On 1/8/2026 1:24 PM, Krishna Kurapati wrote:
> From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> 
> Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
> fallback to indicate the compatibility of the M31 eUSB2 PHY on the
> Kaanapali with that on the SM8750.
> 
> Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
> Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> index 409803874c97..cd6b84213a7c 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
> @@ -19,6 +19,7 @@ properties:
>        - items:
>            - enum:
>                - qcom,glymur-m31-eusb2-phy
> +              - qcom,kaanapali-m31-eusb2-phy
>            - const: qcom,sm8750-m31-eusb2-phy
>        - const: qcom,sm8750-m31-eusb2-phy
>  

I think the reviewed-by tag should be reserved as this is patch rebase.

Thanks,
Jingyi

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* Re: [PATCH V4 4/4] arm64: dts: qcom: hamoa-iot-evk: Enable UFS
From: Manivannan Sadhasivam @ 2026-01-08  5:25 UTC (permalink / raw)
  To: Pradeep P V K
  Cc: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, martin.petersen,
	andersson, konradybcio, taniya.das, dmitry.baryshkov,
	manivannan.sadhasivam, linux-arm-msm, linux-phy, devicetree,
	linux-kernel, linux-scsi, nitin.rawat, Konrad Dybcio
In-Reply-To: <20260106154207.1871487-5-pradeep.pragallapati@oss.qualcomm.com>

On Tue, Jan 06, 2026 at 09:12:07PM +0530, Pradeep P V K wrote:
> Enable UFS for HAMOA-IOT-EVK board.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>

Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>

- Mani

> ---
>  arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> index 88e3e7bed998..23cd913b05f5 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
> @@ -1253,6 +1253,24 @@ &uart21 {
>  	status = "okay";
>  };
>  
> +&ufs_mem_phy {
> +	vdda-phy-supply = <&vreg_l3i_0p8>;
> +	vdda-pll-supply = <&vreg_l3e_1p2>;
> +
> +	status = "okay";
> +};
> +
> +&ufs_mem_hc {
> +	reset-gpios = <&tlmm 238 GPIO_ACTIVE_LOW>;
> +
> +	vcc-supply = <&vreg_l17b_2p5>;
> +	vcc-max-microamp = <1300000>;
> +	vccq-supply = <&vreg_l2i_1p2>;
> +	vccq-max-microamp = <1200000>;
> +
> +	status = "okay";
> +};
> +
>  &usb_1_ss0_dwc3_hs {
>  	remote-endpoint = <&pmic_glink_ss0_hs_in>;
>  };
> -- 
> 2.34.1
> 

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* [PATCH v3 2/2] dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for Kaanapali
From: Krishna Kurapati @ 2026-01-08  5:24 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul
  Cc: linux-arm-msm, devicetree, linux-kernel, linux-phy, Ronak Raheja,
	Jingyi Wang, Krishna Kurapati
In-Reply-To: <20260108052459.1819970-1-krishna.kurapati@oss.qualcomm.com>

From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>

Document M31 eUSB2 PHY for Kaanapali which handles the USB2 path. Use
fallback to indicate the compatibility of the M31 eUSB2 PHY on the
Kaanapali with that on the SM8750.

Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
index 409803874c97..cd6b84213a7c 100644
--- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
@@ -19,6 +19,7 @@ properties:
       - items:
           - enum:
               - qcom,glymur-m31-eusb2-phy
+              - qcom,kaanapali-m31-eusb2-phy
           - const: qcom,sm8750-m31-eusb2-phy
       - const: qcom,sm8750-m31-eusb2-phy
 
-- 
2.34.1


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* [PATCH v3 1/2] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Kaanapali QMP PHY
From: Krishna Kurapati @ 2026-01-08  5:24 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul
  Cc: linux-arm-msm, devicetree, linux-kernel, linux-phy, Ronak Raheja,
	Jingyi Wang, Krzysztof Kozlowski, Krishna Kurapati
In-Reply-To: <20260108052459.1819970-1-krishna.kurapati@oss.qualcomm.com>

From: Ronak Raheja <ronak.raheja@oss.qualcomm.com>

Document QMP combo PHY for Kaanapali. Use fallback to indicate the
compatibility of the QMP PHY on the Kaanapali with that on the SM8750.

Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com>
Co-developed-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
---
 .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml    | 58 ++++++++++---------
 1 file changed, 32 insertions(+), 26 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
index 0568f0a1f356..3d537b7f9985 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
@@ -15,23 +15,28 @@ description:
 
 properties:
   compatible:
-    enum:
-      - qcom,glymur-qmp-usb3-dp-phy
-      - qcom,sar2130p-qmp-usb3-dp-phy
-      - qcom,sc7180-qmp-usb3-dp-phy
-      - qcom,sc7280-qmp-usb3-dp-phy
-      - qcom,sc8180x-qmp-usb3-dp-phy
-      - qcom,sc8280xp-qmp-usb43dp-phy
-      - qcom,sdm845-qmp-usb3-dp-phy
-      - qcom,sm6350-qmp-usb3-dp-phy
-      - qcom,sm8150-qmp-usb3-dp-phy
-      - qcom,sm8250-qmp-usb3-dp-phy
-      - qcom,sm8350-qmp-usb3-dp-phy
-      - qcom,sm8450-qmp-usb3-dp-phy
-      - qcom,sm8550-qmp-usb3-dp-phy
-      - qcom,sm8650-qmp-usb3-dp-phy
-      - qcom,sm8750-qmp-usb3-dp-phy
-      - qcom,x1e80100-qmp-usb3-dp-phy
+    oneOf:
+      - items:
+          - enum:
+              - qcom,kaanapali-qmp-usb3-dp-phy
+          - const: qcom,sm8750-qmp-usb3-dp-phy
+      - enum:
+          - qcom,glymur-qmp-usb3-dp-phy
+          - qcom,sar2130p-qmp-usb3-dp-phy
+          - qcom,sc7180-qmp-usb3-dp-phy
+          - qcom,sc7280-qmp-usb3-dp-phy
+          - qcom,sc8180x-qmp-usb3-dp-phy
+          - qcom,sc8280xp-qmp-usb43dp-phy
+          - qcom,sdm845-qmp-usb3-dp-phy
+          - qcom,sm6350-qmp-usb3-dp-phy
+          - qcom,sm8150-qmp-usb3-dp-phy
+          - qcom,sm8250-qmp-usb3-dp-phy
+          - qcom,sm8350-qmp-usb3-dp-phy
+          - qcom,sm8450-qmp-usb3-dp-phy
+          - qcom,sm8550-qmp-usb3-dp-phy
+          - qcom,sm8650-qmp-usb3-dp-phy
+          - qcom,sm8750-qmp-usb3-dp-phy
+          - qcom,x1e80100-qmp-usb3-dp-phy
 
   reg:
     maxItems: 1
@@ -197,15 +202,16 @@ allOf:
   - if:
       properties:
         compatible:
-          enum:
-            - qcom,glymur-qmp-usb3-dp-phy
-            - qcom,sar2130p-qmp-usb3-dp-phy
-            - qcom,sc8280xp-qmp-usb43dp-phy
-            - qcom,sm6350-qmp-usb3-dp-phy
-            - qcom,sm8550-qmp-usb3-dp-phy
-            - qcom,sm8650-qmp-usb3-dp-phy
-            - qcom,sm8750-qmp-usb3-dp-phy
-            - qcom,x1e80100-qmp-usb3-dp-phy
+          contains:
+            enum:
+              - qcom,glymur-qmp-usb3-dp-phy
+              - qcom,sar2130p-qmp-usb3-dp-phy
+              - qcom,sc8280xp-qmp-usb43dp-phy
+              - qcom,sm6350-qmp-usb3-dp-phy
+              - qcom,sm8550-qmp-usb3-dp-phy
+              - qcom,sm8650-qmp-usb3-dp-phy
+              - qcom,sm8750-qmp-usb3-dp-phy
+              - qcom,x1e80100-qmp-usb3-dp-phy
     then:
       required:
         - power-domains
-- 
2.34.1


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* [PATCH v3 0/2] phy: qcom: Introduce USB support for Kaanapali
From: Krishna Kurapati @ 2026-01-08  5:24 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
	Vinod Koul
  Cc: linux-arm-msm, devicetree, linux-kernel, linux-phy,
	Krishna Kurapati

Add support for the PHYs used for USB on Kaanapali SoCs.

On v2, the usb controller bindings have been split and v3 was sent and it
got merged.

The m31 eusb2 defconfig patch also got merged.

Changes in v3:
- Rebased phy binding since glymur phy bindigs have been merged.
- Removed RB tag of Krzysztof on M31 Phy bindings since the changes now
  expand compatibles list that use sm8750 as fallback instead of
  implementing the fallback.

Link to v2:
https://lore.kernel.org/all/20251021-knp-usb-v2-0-a2809fffcfab@oss.qualcomm.com/

Changes in v2:
- fix author name typo

Link to v1:
https://lore.kernel.org/r/20250924-knp-usb-v1-0-48bf9fbcc546@oss.qualcomm.com

Ronak Raheja (2):
  dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Kaanapali QMP PHY
  dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for
    Kaanapali

 .../bindings/phy/qcom,m31-eusb2-phy.yaml      |  1 +
 .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml    | 58 ++++++++++---------
 2 files changed, 33 insertions(+), 26 deletions(-)

-- 
2.34.1


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* Re: [PATCH V4 2/4] dt-bindings: ufs: qcom,sc7180-ufshc: Add UFSHC compatible for x1e80100
From: Manivannan Sadhasivam @ 2026-01-08  4:58 UTC (permalink / raw)
  To: Pradeep P V K
  Cc: vkoul, neil.armstrong, robh, krzk+dt, conor+dt, martin.petersen,
	andersson, konradybcio, taniya.das, dmitry.baryshkov,
	linux-arm-msm, linux-phy, devicetree, linux-kernel, linux-scsi,
	nitin.rawat
In-Reply-To: <20260106154207.1871487-3-pradeep.pragallapati@oss.qualcomm.com>

On Tue, Jan 06, 2026 at 09:12:05PM +0530, Pradeep P V K wrote:
> Add UFS Host Controller (UFSHC) compatible for x1e80100 SoC. Use
> SM8550 as a fallback since x1e80100 is fully compatible with it.
> 
> Qualcomm UFSHC is no longer compatible with JEDEC UFS-2.0 binding.
> Avoid using the "jedec,ufs-2.0" string in the compatible property.
> 
> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>

Acked-by: Manivannan Sadhasivam <mani@kernel.org>

- Mani

> ---
>  .../bindings/ufs/qcom,sc7180-ufshc.yaml       | 36 +++++++++++--------
>  1 file changed, 21 insertions(+), 15 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml b/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml
> index d94ef4e6b85a..fe18e41ebac7 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,sc7180-ufshc.yaml
> @@ -31,21 +31,27 @@ select:
>  
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - qcom,msm8998-ufshc
> -          - qcom,qcs8300-ufshc
> -          - qcom,sa8775p-ufshc
> -          - qcom,sc7180-ufshc
> -          - qcom,sc7280-ufshc
> -          - qcom,sc8180x-ufshc
> -          - qcom,sc8280xp-ufshc
> -          - qcom,sm8250-ufshc
> -          - qcom,sm8350-ufshc
> -          - qcom,sm8450-ufshc
> -          - qcom,sm8550-ufshc
> -      - const: qcom,ufshc
> -      - const: jedec,ufs-2.0
> +    oneOf:
> +      - items:
> +          - enum:
> +              - qcom,x1e80100-ufshc
> +          - const: qcom,sm8550-ufshc
> +          - const: qcom,ufshc
> +      - items:
> +          - enum:
> +              - qcom,msm8998-ufshc
> +              - qcom,qcs8300-ufshc
> +              - qcom,sa8775p-ufshc
> +              - qcom,sc7180-ufshc
> +              - qcom,sc7280-ufshc
> +              - qcom,sc8180x-ufshc
> +              - qcom,sc8280xp-ufshc
> +              - qcom,sm8250-ufshc
> +              - qcom,sm8350-ufshc
> +              - qcom,sm8450-ufshc
> +              - qcom,sm8550-ufshc
> +          - const: qcom,ufshc
> +          - const: jedec,ufs-2.0
>  
>    reg:
>      maxItems: 1
> -- 
> 2.34.1
> 

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