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From: "Matt Sealey" <matt@genesi-usa.com>
To: 'Paul Mackerras' <paulus@samba.org>
Cc: linux-pm@lists.osdl.org
Subject: Re: PowerPC cpufreq using ICTC
Date: Thu, 29 Jun 2006 07:30:23 -0500	[thread overview]
Message-ID: <007d01c69b77$cd36ec20$99dfdfdf@bakuhatsu.net> (raw)
In-Reply-To: <17571.27179.106239.531807@cargo.ozlabs.ibm.com>


> > (when DPM is enabled). This should, by all documentation, 
> reduce the power consumption of the CPU.
> 
> But does it reduce the energy consumed per instruction 
> executed, or increase it?

In theory if you do not issue instructions to the units, DPM turns
themselves off saving (from some Freescale doc on the subject) around
6% power (while running benchmark code). Every pipeline bubble
adds to the power saving! :]

Then the theory goes that if you can force the units to sit idle for
1-255 instructions you can save more.

I have no idea if it actually works.. that is what I wanted to find
out.

> see any improvement in energy per instruction unless you can 
> reduce the CPU core Vdd voltage.

It doesn't improve energy per instruction, so much as allow the units
to go into low-power states so while there are no instructions being
fetched, you aren't wasting power.

> If you can't reduce the energy per instruction then you might 
> as well "race to idle", which is effectively what we do currently.

Like I said that is what I wanted to find out. Let me find that
Freescale doc..

http://www.freescale.com/files/32bit/doc/app_note/AN2436.pdf

-- 
Matt Sealey <matt@genesi-usa.com>
Manager, Genesi, Developer Relations

      reply	other threads:[~2006-06-29 12:30 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-06-27 14:56 PowerPC cpufreq using ICTC Matt Sealey
2006-06-27 22:14 ` Guennadi Liakhovetski
2006-06-27 23:23 ` Benjamin Herrenschmidt
2006-06-28  8:04   ` Matt Sealey
2006-06-29  5:50 ` Paul Mackerras
2006-06-29 12:30   ` Matt Sealey [this message]

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