[PATCH v2 3/3] arm64: dts: exynosautov920: Add tmu hardware binding

Shin Son
2025-09-03T07:36:58Z

Create a new exynosautov920-tmu.dtsi describing new TMU hardware
and include it from exynosautov920.dtsi.

The exynosautov920-tmu node uses the misc clock as its source
and exposes two new DT properties:

- samsung,hw-sensor-indices: defines valid sensors for the bitmap

This TMU binding defines six thermal zones with a critical trip point
at 125 degrees:

tmu_top : cpucl0-0, cpucl1
tmu_sub0: cpucl0-1, cpucl2
tmu_sub1: g3d, npu

Signed-off-by: Shin Son <shin.son@samsung.com>
---
.../boot/dts/exynos/exynosautov920-tmu.dtsi | 97 +++++++++++++++++++
.../arm64/boot/dts/exynos/exynosautov920.dtsi | 31 ++++++
2 files changed, 128 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
new file mode 100644
index 000000000000..eb1864e69bef
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAuto920 TMU configurations device tree source
+ *
+ * Copyright (c) 2020 Samsung Electronics Co., Ltd.
+ *
+ * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are listed as
+ * device tree nodes in this file.
+ */
+
+/ {
+ thermal-zones {
+ cpucl0-0-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_top 0>;
+
+ trips {
+ cpucl0_0_critical: cpucl0-0-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ cpucl0-1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_sub0 0>;
+
+ trips {
+ cpucl0_1_critical: cpucl0-1-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ cpucl1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_top 1>;
+
+ trips {
+ cpucl1_critical: cpucl1-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ cpucl2-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_sub0 1>;
+
+ trips {
+ cpucl2_critical: cpucl2-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ g3d-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_sub1 0>;
+
+ trips {
+ g3d_critical: g3d-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+
+ npu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu_sub1 1>;
+
+ trips {
+ npu_critical: npu-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index 0fdf2062930a..642f766d4106 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -330,6 +330,36 @@ watchdog_cl1: watchdog@10070000 {
samsung,cluster-index = <1>;
};

+ tmu_top: tmu@100a0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100A0000 0x1000>;
+ interrupts = <GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ samsung,hw-sensor-indices = <1 2 3 4 5 6 7 8 9 10 11 12>;
+ };
+
+ tmu_sub0: tmu@100b0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100B0000 0x1000>;
+ interrupts = <GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ samsung,hw-sensor-indices = <3 4 5 6 7 8 9 10>;
+ };
+
+ tmu_sub1: tmu@100c0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100C0000 0x1000>;
+ interrupts = <GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ samsung,hw-sensor-indices = <1 2 3 4 6 7>;
+ };
+
gic: interrupt-controller@10400000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@@ -1507,3 +1537,4 @@ timer {
};

#include "exynosautov920-pinctrl.dtsi"
+#include "exynosautov920-tmu.dtsi"
--
2.50.1