From: Zhang Rui <rui.zhang@intel.com>
To: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: Ranganath Krishnan <ranganath@ti.com>,
linux-pm@vger.kernel.org, Praneeth Bajjuri <praneeth@ti.com>
Subject: Re: [PATCH 1/3] thermal: ti-soc-thermal: Initialize counter_delay field for TI DRA752 sensors
Date: Fri, 30 Aug 2013 16:42:05 +0800 [thread overview]
Message-ID: <1377852125.2652.3.camel@rzhang-lenovo> (raw)
In-Reply-To: <521F3C49.3020402@ti.com>
On 四, 2013-08-29 at 08:19 -0400, Eduardo Valentin wrote:
> On 23-08-2013 12:08, Ranganath Krishnan wrote:
> > Initialize MPU, GPU, CORE, DSPEVE and IVA thermal sensors of DRA752 bandgap
> > with the counter delay mask.
> >
> > Signed-off-by: Ranganath Krishnan <ranganath@ti.com>
>
>
> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com>
>
are you going to take this patch series?
thanks,
rui
> > ---
> > .../thermal/ti-soc-thermal/dra752-thermal-data.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c b/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c
> > index e5d8326..a492927 100644
> > --- a/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c
> > +++ b/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c
> > @@ -42,6 +42,7 @@ dra752_core_temp_sensor_registers = {
> > .mask_hot_mask = DRA752_BANDGAP_CTRL_1_MASK_HOT_CORE_MASK,
> > .mask_cold_mask = DRA752_BANDGAP_CTRL_1_MASK_COLD_CORE_MASK,
> > .mask_sidlemode_mask = DRA752_BANDGAP_CTRL_1_SIDLEMODE_MASK,
> > + .mask_counter_delay_mask = DRA752_BANDGAP_CTRL_1_COUNTER_DELAY_MASK,
> > .mask_freeze_mask = DRA752_BANDGAP_CTRL_1_FREEZE_CORE_MASK,
> > .mask_clear_mask = DRA752_BANDGAP_CTRL_1_CLEAR_CORE_MASK,
> > .mask_clear_accum_mask = DRA752_BANDGAP_CTRL_1_CLEAR_ACCUM_CORE_MASK,
> > @@ -77,6 +78,7 @@ dra752_iva_temp_sensor_registers = {
> > .mask_hot_mask = DRA752_BANDGAP_CTRL_2_MASK_HOT_IVA_MASK,
> > .mask_cold_mask = DRA752_BANDGAP_CTRL_2_MASK_COLD_IVA_MASK,
> > .mask_sidlemode_mask = DRA752_BANDGAP_CTRL_1_SIDLEMODE_MASK,
> > + .mask_counter_delay_mask = DRA752_BANDGAP_CTRL_1_COUNTER_DELAY_MASK,
> > .mask_freeze_mask = DRA752_BANDGAP_CTRL_2_FREEZE_IVA_MASK,
> > .mask_clear_mask = DRA752_BANDGAP_CTRL_2_CLEAR_IVA_MASK,
> > .mask_clear_accum_mask = DRA752_BANDGAP_CTRL_2_CLEAR_ACCUM_IVA_MASK,
> > @@ -112,6 +114,7 @@ dra752_mpu_temp_sensor_registers = {
> > .mask_hot_mask = DRA752_BANDGAP_CTRL_1_MASK_HOT_MPU_MASK,
> > .mask_cold_mask = DRA752_BANDGAP_CTRL_1_MASK_COLD_MPU_MASK,
> > .mask_sidlemode_mask = DRA752_BANDGAP_CTRL_1_SIDLEMODE_MASK,
> > + .mask_counter_delay_mask = DRA752_BANDGAP_CTRL_1_COUNTER_DELAY_MASK,
> > .mask_freeze_mask = DRA752_BANDGAP_CTRL_1_FREEZE_MPU_MASK,
> > .mask_clear_mask = DRA752_BANDGAP_CTRL_1_CLEAR_MPU_MASK,
> > .mask_clear_accum_mask = DRA752_BANDGAP_CTRL_1_CLEAR_ACCUM_MPU_MASK,
> > @@ -147,6 +150,7 @@ dra752_dspeve_temp_sensor_registers = {
> > .mask_hot_mask = DRA752_BANDGAP_CTRL_2_MASK_HOT_DSPEVE_MASK,
> > .mask_cold_mask = DRA752_BANDGAP_CTRL_2_MASK_COLD_DSPEVE_MASK,
> > .mask_sidlemode_mask = DRA752_BANDGAP_CTRL_1_SIDLEMODE_MASK,
> > + .mask_counter_delay_mask = DRA752_BANDGAP_CTRL_1_COUNTER_DELAY_MASK,
> > .mask_freeze_mask = DRA752_BANDGAP_CTRL_2_FREEZE_DSPEVE_MASK,
> > .mask_clear_mask = DRA752_BANDGAP_CTRL_2_CLEAR_DSPEVE_MASK,
> > .mask_clear_accum_mask = DRA752_BANDGAP_CTRL_2_CLEAR_ACCUM_DSPEVE_MASK,
> > @@ -182,6 +186,7 @@ dra752_gpu_temp_sensor_registers = {
> > .mask_hot_mask = DRA752_BANDGAP_CTRL_1_MASK_HOT_GPU_MASK,
> > .mask_cold_mask = DRA752_BANDGAP_CTRL_1_MASK_COLD_GPU_MASK,
> > .mask_sidlemode_mask = DRA752_BANDGAP_CTRL_1_SIDLEMODE_MASK,
> > + .mask_counter_delay_mask = DRA752_BANDGAP_CTRL_1_COUNTER_DELAY_MASK,
> > .mask_freeze_mask = DRA752_BANDGAP_CTRL_1_FREEZE_GPU_MASK,
> > .mask_clear_mask = DRA752_BANDGAP_CTRL_1_CLEAR_GPU_MASK,
> > .mask_clear_accum_mask = DRA752_BANDGAP_CTRL_1_CLEAR_ACCUM_GPU_MASK,
> >
>
>
next prev parent reply other threads:[~2013-08-30 8:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-23 16:08 [PATCH 1/3] thermal: ti-soc-thermal: Initialize counter_delay field for TI DRA752 sensors Ranganath Krishnan
2013-08-23 16:08 ` [PATCH 2/3] thermal: ti-soc-thermal: Set the bandgap mask counter delay value Ranganath Krishnan
2013-08-23 16:08 ` [PATCH 3/3] thermal: ti-soc-thermal: Ensure to compute thermal trend Ranganath Krishnan
2013-08-29 12:19 ` [PATCH 1/3] thermal: ti-soc-thermal: Initialize counter_delay field for TI DRA752 sensors Eduardo Valentin
2013-08-30 8:42 ` Zhang Rui [this message]
2013-08-30 12:35 ` Eduardo Valentin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1377852125.2652.3.camel@rzhang-lenovo \
--to=rui.zhang@intel.com \
--cc=eduardo.valentin@ti.com \
--cc=linux-pm@vger.kernel.org \
--cc=praneeth@ti.com \
--cc=ranganath@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).