Re: [PATCH] cpufreq: intel_pstate: Check cpuid for MSR_HWP_INTERRUPT

["Pandruvada, Srinivas" <srinivas.pandruvada@intel.com>]

On Tue, 2016-07-19 at 16:34 -0700, Srinivas Pandruvada wrote:
> From: spandruv <spandruv@spandruv-mobl.jf.intel.com>
> 
Please ignore this patch. Tried from wrong computer.



> The MSR MSR_HWP_INTERRUPT is valid only when CPUID.06H:EAX[8] = 1, so
> check for feature before accessing this MSR.
> 
> Signed-off-by: spandruv <spandruv@spandruv-mobl.jf.intel.com>
> ---
>  drivers/cpufreq/intel_pstate.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cpufreq/intel_pstate.c
> b/drivers/cpufreq/intel_pstate.c
> index 2fe9af1..712afbd 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -822,8 +822,10 @@ static void __init
> intel_pstate_sysfs_expose_params(void)
>  
>  static void intel_pstate_hwp_enable(struct cpudata *cpudata)
>  {
> +
>  	/* First disable HWP notification interrupt as we don't
> process them */
> -	wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
> +	if (static_cpu_has(X86_FEATURE_HWP_NOTIFY))
> +		wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT,
> 0x00);
>  
>  	wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
>  }