From: Tim Chen <tim.c.chen@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: rjw@rjwysocki.net, mingo@redhat.com, bp@suse.de, x86@kernel.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, peterz@infradead.org,
jolsa@redhat.com
Subject: Re: [PATCH v5 4/9] x86: Enable Intel Turbo Boost Max Technology 3.0
Date: Wed, 05 Oct 2016 09:05:20 -0700 [thread overview]
Message-ID: <1475683520.3916.285.camel@linux.intel.com> (raw)
In-Reply-To: <alpine.DEB.2.20.1610051616010.8953@nanos>
On Wed, 2016-10-05 at 16:23 +0200, Thomas Gleixner wrote:
> On Sat, 1 Oct 2016, Srinivas Pandruvada wrote:
> >
> > +void sched_set_itmt_support(bool itmt_supported)
> > +{
> > + mutex_lock(&itmt_update_mutex);
> > +
> > + if (itmt_supported != sched_itmt_capable)
> > + sched_itmt_capable = itmt_supported;
> Yikes. What is this conditional for? The only value it has is to confuse
> the reader.
Will remove the check.
>
> >
> > +
> > + mutex_unlock(&itmt_update_mutex);
> > +}
> > +
> > +DEFINE_PER_CPU_READ_MOSTLY(int, sched_core_priority);
> Darn. Do not stick variable definitiions in the middle of the code and
> especially not glued to the function w/o a newline in between. Move it to
> the top of the file.
Will move to top of file.
>
> >
> > +int arch_asym_cpu_priority(int cpu)
> > +{
> > + return per_cpu(sched_core_priority, cpu);
> > +}
>
> >
> > +void sched_set_itmt_core_prio(int prio, int core_cpu)
> > +{
> > + int cpu, i = 1;
> > +
> > + for_each_cpu(cpu, topology_sibling_cpumask(core_cpu)) {
> > + int smt_prio;
> > +
> > + /*
> > + * Ensure that the siblings are moved to the end
> > + * of the priority chain and only used when
> > + * all other high priority cpus are out of capacity.
> > + */
> > + smt_prio = prio * smp_num_siblings / i;
> > + i++;
> Your code ordering is really random. What has this i++ to do with the
> store? Nothing. It just makes reading the code harder. Just move it below
> the store.
Will move it to the end of for loop.
>
> >
> > + per_cpu(sched_core_priority, cpu) = smt_prio;
Thanks.
Tim
next prev parent reply other threads:[~2016-10-05 16:05 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-01 11:45 [PATCH v5 0/9] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 1/9] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-10-01 16:38 ` Nilay Vaish
2016-10-03 16:49 ` Tim Chen
2016-10-01 11:45 ` [PATCH v5 2/9] x86/topology: Provide topology_num_packages() Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 3/9] x86/topology: Define x86's arch_update_cpu_topology Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 4/9] x86: Enable Intel Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-10-05 14:23 ` Thomas Gleixner
2016-10-05 16:05 ` Tim Chen [this message]
2016-10-01 11:45 ` [PATCH v5 5/9] x86/sysctl: Add sysctl for ITMT scheduling feature Srinivas Pandruvada
2016-10-05 14:35 ` Thomas Gleixner
2016-10-05 16:24 ` Tim Chen
2016-10-06 11:13 ` Thomas Gleixner
2016-10-06 17:37 ` Tim Chen
2016-10-12 16:50 ` Tim Chen
2016-10-01 11:45 ` [PATCH v5 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 7/9] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 8/9] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 9/9] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
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