From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Shevchenko Subject: Re: S0ix failure due to "clk: x86: Do not gate clocks enabled by the firmware" Date: Mon, 18 Sep 2017 11:00:29 +0300 Message-ID: <1505721629.25945.273.camel@linux.intel.com> References: <20170906204237.24x6fzlfmq7jmuce@sig21.net> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: Received: from mga07.intel.com ([134.134.136.100]:34643 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752315AbdIRIAc (ORCPT ); Mon, 18 Sep 2017 04:00:32 -0400 In-Reply-To: Sender: linux-pm-owner@vger.kernel.org List-Id: linux-pm@vger.kernel.org To: Carlo Caione , Johannes Stezenbach Cc: linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Pierre-Louis Bossart , Darren Hart , Enric Balletbo i Serra On Wed, 2017-09-06 at 23:14 +0200, Carlo Caione wrote: > On Wed, Sep 6, 2017 at 10:42 PM, Johannes Stezenbach > wrote: > Also I will probably send an email tomorrow about this but today > (coincidentally) I discovered that this fix is not working anymore on > my platform. This is due to commit a49d25364df ("staging/atomisp: Add > support for the Intel IPU v2"). I haven't had a chance yet to > investigated why though. When you are going to do, check as well my clean up series to atomisp. I noticed the driver messes up the things it shouldn't touch at all. I removed Intel MID related parts from it, so, I hope it will help you. -- Andy Shevchenko Intel Finland Oy