[PATCH] PM/QoS: resume latency 0 should be not latency allowed

[Youquan Song <youquan.song@intel.com>]

ICX and more recent Intel CPU has C1 exit_latency equal 1 in intel_idle
driver, There are PM QoS interfaces: global /dev/cpu_dma_latency and 
per-device latency constraints. per-CPU set pm_qos_resume_latency_us
to limit single CPU entery into deepest C-state. 
When it is required to disable entry into even C1, we need to set "0"
 to /sys pm_qos_resume_latency_us, but "0" of pm_qos_resume_latency_us
is redefined to no constraint now. 

so this patch set "0" back to original meaning "no latency at all".

Signed-off-by: Youquan Song <youquan.song@intel.com>
---
 drivers/base/power/sysfs.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index a1474fb67db9..b4bd67e6f440 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c
@@ -214,10 +214,8 @@ static ssize_t pm_qos_resume_latency_us_show(struct device *dev,
 {
 	s32 value = dev_pm_qos_requested_resume_latency(dev);
 
-	if (value == 0)
-		return sysfs_emit(buf, "n/a\n");
 	if (value == PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)
-		value = 0;
+		return sysfs_emit(buf, "no constraint\n");
 
 	return sysfs_emit(buf, "%d\n", value);
 }
@@ -237,10 +235,8 @@ static ssize_t pm_qos_resume_latency_us_store(struct device *dev,
 		if (value < 0 || value == PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)
 			return -EINVAL;
 
-		if (value == 0)
-			value = PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
 	} else if (sysfs_streq(buf, "n/a")) {
-		value = 0;
+		value = PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
 	} else {
 		return -EINVAL;
 	}
-- 
2.27.0