From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59594C04AB6 for ; Fri, 31 May 2019 08:26:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 338E2265BF for ; Fri, 31 May 2019 08:26:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726874AbfEaI0l (ORCPT ); Fri, 31 May 2019 04:26:41 -0400 Received: from cloudserver094114.home.pl ([79.96.170.134]:44708 "EHLO cloudserver094114.home.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726240AbfEaI0k (ORCPT ); Fri, 31 May 2019 04:26:40 -0400 Received: from 79.184.255.225.ipv4.supernova.orange.pl (79.184.255.225) (HELO kreacher.localnet) by serwer1319399.home.pl (79.96.170.134) with SMTP (IdeaSmtpServer 0.83.213) id 839ca75bcd552a6f; Fri, 31 May 2019 10:26:38 +0200 From: "Rafael J. Wysocki" To: Josh Poimboeuf , Jiri Kosina Cc: "Rafael J. Wysocki" , Thomas Gleixner , the arch/x86 maintainers , Pavel Machek , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Peter Zijlstra , Linux PM , Linux Kernel Mailing List , Andy Lutomirski Subject: Re: [PATCH v4] x86/power: Fix 'nosmt' vs. hibernation triple fault during resume Date: Fri, 31 May 2019 10:26:37 +0200 Message-ID: <1639292.WxYr0VA4et@kreacher> In-Reply-To: <20190531051456.fzkvn62qlkf6wqra@treble> References: <20190531051456.fzkvn62qlkf6wqra@treble> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org On Friday, May 31, 2019 7:14:56 AM CEST Josh Poimboeuf wrote: > On Fri, May 31, 2019 at 01:42:02AM +0200, Jiri Kosina wrote: > > On Thu, 30 May 2019, Josh Poimboeuf wrote: > > > > > > > Reviewed-by: Thomas Gleixner > > > > > > > > Yes, it is, thanks! > > > > > > I still think changing monitor/mwait to use a fixmap address would be a > > > much cleaner way to fix this. I can try to work up a patch tomorrow. > > > > I disagree with that from the backwards compatibility point of view. > > > > I personally am quite frequently using differnet combinations of > > resumer/resumee kernels, and I've never been biten by it so far. I'd guess > > I am not the only one. > > Fixmap sort of breaks that invariant. > > Right now there is no backwards compatibility because nosmt resume is > already broken. > > For "future" backwards compatibility we could just define a hard-coded > reserved fixmap page address, adjacent to the vsyscall reserved address. > > Something like this (not yet tested)? Maybe we could also remove the > resume_play_dead() hack? Yes, we can IMO, but in a separate patch, please. > diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h > index 9da8cccdf3fb..1c328624162c 100644 > --- a/arch/x86/include/asm/fixmap.h > +++ b/arch/x86/include/asm/fixmap.h > @@ -80,6 +80,7 @@ enum fixed_addresses { > #ifdef CONFIG_X86_VSYSCALL_EMULATION > VSYSCALL_PAGE = (FIXADDR_TOP - VSYSCALL_ADDR) >> PAGE_SHIFT, > #endif > + FIX_MWAIT = (FIXADDR_TOP - VSYSCALL_ADDR - 1) >> PAGE_SHIFT, > #endif > FIX_DBGP_BASE, > FIX_EARLYCON_MEM_BASE, > diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c > index 73e69aaaa117..9804fbe25d03 100644 > --- a/arch/x86/kernel/smpboot.c > +++ b/arch/x86/kernel/smpboot.c > @@ -108,6 +108,8 @@ int __read_mostly __max_smt_threads = 1; > /* Flag to indicate if a complete sched domain rebuild is required */ > bool x86_topology_update; > > +static char __mwait_page[PAGE_SIZE]; > + > int arch_update_cpu_topology(void) > { > int retval = x86_topology_update; > @@ -1319,6 +1321,8 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) > smp_quirk_init_udelay(); > > speculative_store_bypass_ht_init(); > + > + set_fixmap(FIX_MWAIT, __pa_symbol(&__mwait_page)); > } > > void arch_enable_nonboot_cpus_begin(void) > @@ -1631,11 +1635,12 @@ static inline void mwait_play_dead(void) > } > > /* > - * This should be a memory location in a cache line which is > - * unlikely to be touched by other processors. The actual > - * content is immaterial as it is not actually modified in any way. > + * This memory location is never actually written to. It's mapped at a > + * reserved fixmap address to ensure the monitored address remains > + * valid across a hibernation resume operation. Otherwise a triple > + * fault can occur. > */ > - mwait_ptr = ¤t_thread_info()->flags; > + mwait_ptr = (void *)fix_to_virt(FIX_MWAIT); > > wbinvd(); > > Jiri, any chance to test this?