[PATCH v4 0/2] SM8750 CPU BWMONs

[PATCH v4 0/2] SM8750 CPU BWMONs

[Konrad Dybcio]

Taking this series over from Melody, just adding some small changes
(see below):

Changes in v4:
- Extend the bindings as necessary
- Re-position the nodes to maintain order
- Add nonposted-mmio for the instance that needs it
Link to v3: https://lore.kernel.org/linux-arm-msm/20250304-sm8750_bwmon_master-v3-1-01a5cb330dd9@quicinc.com/

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (1):
      dt-bindings: interconnect: qcom,msm8998-bwmon: Allow 'nonposted-mmio'

Shivnandan Kumar (1):
      arm64: dts: qcom: sm8750: Add BWMONs

 .../bindings/interconnect/qcom,msm8998-bwmon.yaml  |  2 +
 arch/arm64/boot/dts/qcom/sm8750.dtsi               | 76 ++++++++++++++++++++++
 2 files changed, 78 insertions(+)
---
base-commit: 0be23810e32e6d0a17df7c0ebad895ba2c210fc4
change-id: 20250716-8750_cpubwmon-738306859c6f

Best regards,
-- 
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

[PATCH v4 1/2] dt-bindings: interconnect: qcom,msm8998-bwmon: Allow 'nonposted-mmio'

[Konrad Dybcio]

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

One of the BWMON instances on SM8750 requires that its MMIO space is
mapped specifically with the nE memory attribute.

Allow the nonposted-mmio property which instructs the OS to do so.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
index 83bcf0575cd372926102e2764055c3576822c915..256de140c03dc50cb77bc38a6bbc2ff96b910207 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
@@ -76,6 +76,8 @@ properties:
     minItems: 1
     maxItems: 2
 
+  nonposted-mmio: true
+
 required:
   - compatible
   - interconnects

-- 
2.50.1

[PATCH v4 2/2] arm64: dts: qcom: sm8750: Add BWMONs

[Konrad Dybcio]

From: Shivnandan Kumar <quic_kshivnan@quicinc.com>

Add the CPU BWMONs for SM8750 SoCs.

Notably, the one related to cluster0 requires that it's mapped with
the nE memory attribute. This is specific to a single instance, on this
platform only and should not be mimicked elsewhere.

Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com>
[konrad: add nonposted-mmio where necessary, re-sort nodes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 76 ++++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 4643705021c6ca095a16d8d7cc3adac920b21e82..79ca262f58115ccc4b0bd91d4efa75715e2b7397 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -3617,6 +3617,82 @@ frame@1680d000 {
 			};
 		};
 
+		/* cluster0 */
+		pmu@240b3400 {
+			compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0x0 0x240b3400 0x0 0x600>;
+
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+			nonposted-mmio;
+
+			cpu_bwmon_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-0 {
+					opp-peak-kBps = <800000>;
+				};
+
+				opp-1 {
+					opp-peak-kBps = <2188000>;
+				};
+
+				opp-2 {
+					opp-peak-kBps = <5414400>;
+				};
+
+				opp-3 {
+					opp-peak-kBps = <6220800>;
+				};
+
+				opp-4 {
+					opp-peak-kBps = <6835200>;
+				};
+
+				opp-5 {
+					opp-peak-kBps = <8371200>;
+				};
+
+				opp-6 {
+					opp-peak-kBps = <10944000>;
+				};
+
+				opp-7 {
+					opp-peak-kBps = <12748800>;
+				};
+
+				opp-8 {
+					opp-peak-kBps = <14745600>;
+				};
+
+				opp-9 {
+					opp-peak-kBps = <16896000>;
+				};
+
+				opp-10 {
+					opp-peak-kBps = <19046400>;
+				};
+			};
+		};
+
+		/* cluster1 */
+		pmu@240b7400 {
+			compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon";
+			reg = <0x0 0x240b7400 0x0 0x600>;
+
+			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+			operating-points-v2 = <&cpu_bwmon_opp_table>;
+		};
+
 		gem_noc: interconnect@24100000 {
 			compatible = "qcom,sm8750-gem-noc";
 			reg = <0x0 0x24100000 0x0 0x14b080>;

-- 
2.50.1

Re: [PATCH v4 1/2] dt-bindings: interconnect: qcom,msm8998-bwmon: Allow 'nonposted-mmio'

[Krzysztof Kozlowski]

On Wed, Jul 16, 2025 at 02:25:46PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> One of the BWMON instances on SM8750 requires that its MMIO space is
> mapped specifically with the nE memory attribute.
> 
> Allow the nonposted-mmio property which instructs the OS to do so.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: (subset) [PATCH v4 0/2] SM8750 CPU BWMONs

[Bjorn Andersson]

On Wed, 16 Jul 2025 14:25:45 +0200, Konrad Dybcio wrote:
> Taking this series over from Melody, just adding some small changes
> (see below):
> 
> Changes in v4:
> - Extend the bindings as necessary
> - Re-position the nodes to maintain order
> - Add nonposted-mmio for the instance that needs it
> Link to v3: https://lore.kernel.org/linux-arm-msm/20250304-sm8750_bwmon_master-v3-1-01a5cb330dd9@quicinc.com/
> 
> [...]

Applied, thanks!

[2/2] arm64: dts: qcom: sm8750: Add BWMONs
      commit: bc6776fab8455762089274d469a67d104e3b96ae

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>