Re: [PATCH 0/5] arm64: sunxi: h616: Enable Mali GPU

Philippe Simons
2025-03-02T22:44:13Z

Tested this on a RG35XX-H (H700),

launching glmark2-es2-drm completely hangs the board.

No kernel oops or error messages.

Philippe

On 21/02/2025 01:57, Andre Przywara wrote:
> The Allwinner H616/H618/H313/H700 SoCs contain a Mali G32 MP2 GPU. This
> IP is from the Bifrost family and is already supported by the panfrost
> driver, so enabling support for 3D graphics on this SoC is rather
> straight-forward.
> However Allwinner added some bits in the PRCM block, that control the
> power domain for the GPU - on top of its power *supply*.
>
> This series enables the Mali GPU on those SoCs, by first introducing a
> power domain driver for that SoC (patch 1/5: DT binding, patch 2/5:
> the actual driver). For the Mali GPU to work we literally need to flip a
> single bit (the BSP does this in the bootloader), and this full featured
> power domain driver is admittedly a bit over the top for that purpose.
> However it seems to be the right thing to do architecturally, and while
> at it I added the other power domains (for analogue, PLLs, and the
> management core), even though we won't use them in Linux and they would
> be always on. I have a simpler version of the driver which just covers
> this single bit controlling the GPU, please let me know if you prefer
> that.
> Please also note that this supersedes an RFC patch I sent a year ago,
> which included this power domain in the R-CCU driver:
> https://lore.kernel.org/linux-sunxi/20240225160616.15001-1-andre.przywara@arm.com/T/#u
>
> The rest of the patches enable the Mali GPU on the DT side: patch 3/5
> adds the compatible string to the Mali DT binding, while patch 4/5 adds
> the purely SoC specific DT nodes, for both the power domain and the Mali
> GPU. The final patch 5/5 then enables the GPU on all existing H616-family
> boards.
>
> There seems to be an existing problem with powering up the GPU, after it
> has been turned off by the kernel. Chances are this is a problem with the
> proper power-up (or power-down) sequence, where clock gates, reset lines
> and the power domain must be asserted in a specific order.
> A workaround used so far downstream is to keep the power domain enabled,
> by ignoring the power-off request. Observing any assumed "proper" sequence
> is a bit more tricky, since there is no Allwinner specific glue driver
> or anything, so things would need be changed in the generic panfrost
> code, where they have the potential of breaking other Mali users.
> I would be interested in hearing opinions about this.
>
> Cheers,
> Andre
>
> Andre Przywara (5):
> dt-bindings: power: Add Allwinner H6/H616 PRCM PPU
> pmdomain: sunxi: add H6 PRCM PPU driver
> dt-bindings: gpu: mali-bifrost: Add Allwinner H616 compatible
> arm64: dts: allwinner: h616: Add Mali GPU node
> arm64: dts: allwinner: h616: enable Mali GPU for all boards
>
> .../bindings/gpu/arm,mali-bifrost.yaml | 1 +
> .../power/allwinner,sun50i-h6-prcm-ppu.yaml | 42 ++++
> .../dts/allwinner/sun50i-h313-tanix-tx1.dts | 5 +
> .../sun50i-h616-bigtreetech-cb1.dtsi | 5 +
> .../allwinner/sun50i-h616-orangepi-zero.dtsi | 4 +
> .../allwinner/sun50i-h616-orangepi-zero2.dts | 4 +
> .../dts/allwinner/sun50i-h616-x96-mate.dts | 5 +
> .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 21 ++
> .../sun50i-h618-longan-module-3h.dtsi | 5 +
> .../allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +
> .../allwinner/sun50i-h618-orangepi-zero3.dts | 4 +
> .../sun50i-h618-transpeed-8k618-t.dts | 5 +
> .../sun50i-h618-yuzukihd-chameleon.dts | 5 +
> .../sun50i-h700-anbernic-rg35xx-2024.dts | 5 +
> drivers/pmdomain/sunxi/Kconfig | 10 +
> drivers/pmdomain/sunxi/Makefile | 1 +
> drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c | 191 ++++++++++++++++++
> 17 files changed, 318 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml
> create mode 100644 drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c
>