From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthew Garrett Subject: Re: [PATCH 4/5]PCIe native PME support Date: Wed, 19 Aug 2009 12:58:11 +0100 Message-ID: <20090819115811.GD12216@srcf.ucam.org> References: <1250666659.23178.119.camel@sli10-desk.sh.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1250666659.23178.119.camel@sli10-desk.sh.intel.com> Sender: linux-acpi-owner@vger.kernel.org To: Shaohua Li Cc: linux acpi , linux-pm , "Rafael J. Wysocki" , Alan Stern List-Id: linux-pm@vger.kernel.org On Wed, Aug 19, 2009 at 03:24:19PM +0800, Shaohua Li wrote: > +static inline void npme_enable_pme(struct pci_dev *pdev, bool enable) > +{ > + int pos; > + u16 rtctl; > + > + pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); > + > + pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &rtctl); > + if (!enable) > + rtctl &= ~PCI_EXP_RTCTL_PMEIE; > + else > + rtctl |= PCI_EXP_RTCTL_PMEIE; > + pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, rtctl); > +} This seems to duplicate the existing pci_pme_active() function? > +static inline void npme_clear_pme(struct pci_dev *pdev) > +{ > + int pos; > + u32 rtsta; > + > + pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); > + > + pci_read_config_dword(pdev, pos + PCI_EXP_RTSTA, &rtsta); > + rtsta |= PCI_EXP_RTSTA_PME; > + pci_write_config_dword(pdev, pos + PCI_EXP_RTSTA, rtsta); > +} Ditto. > +static bool npme_pme_target(struct pci_dev *target) > +{ > + bool ret = false; > + if (target->dev.bus->pm && target->dev.bus->pm->wakeup_event) > + ret = target->dev.bus->pm->wakeup_event(&target->dev); > + return ret; > +} Is there any situation in which we wouldn't want to just perform a runtime resume of the device here? -- Matthew Garrett | mjg59@srcf.ucam.org