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From: Sebastian Reichel <sre-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Josh Wu <josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Cc: Nicolas Ferre
	<nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Guenter Roeck <linux-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>,
	Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Ben Dooks <ben.dooks-4yDnlxn2s6sWdaTGBSpHTA@public.gmane.org>,
	Krzysztof Kozlowski
	<k.kozlowski.k-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Alexandre Belloni
	<alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>,
	Wei Yongjun
	<yongjun_wei-zrsr2BFq86L20UzCJQGyNP8+0UxHXcjY@public.gmane.org>,
	Fabian Frederick <fabf-AgBVmzD5pcezQB+pC5nmwQ@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Boris Brezillon
	<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Dmitry Eremin-Solenikov
	<dbaryshkov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Subject: Re: [PATCH v2 1/2] power: reset: at91: add sama5d3 reset function
Date: Mon, 20 Jul 2015 18:42:42 +0200	[thread overview]
Message-ID: <20150720164241.GA5930@earth> (raw)
In-Reply-To: <1437384726-24927-1-git-send-email-josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

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Hi,

On Mon, Jul 20, 2015 at 05:32:05PM +0800, Josh Wu wrote:
> This patch introduces a new compatible string: "atmel,sama5d3-rstc" and
> new reset function for sama5d3 and later chips.
> 
> As in sama5d3 or later chips, we don't have to shutdown the DDR
> controller before reset. Shutdown the DDR controller before reset is a
> workaround to avoid DDR signal driving the bus, but since sama5d3 and
> later chips there is no such a conflict.
> 
> So in this patch:
>    1. the sama5d3 reset function only need to write the rstc register
> and return.
>    2. we can remove the code related with sama5d3 DDR controller as
> we don't use it at all.
> 
> Signed-off-by: Josh Wu <josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>

queued.

-- Sebastian

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  parent reply	other threads:[~2015-07-20 16:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-20  9:32 [PATCH v2 1/2] power: reset: at91: add sama5d3 reset function Josh Wu
2015-07-20  9:33 ` Alexandre Belloni
2015-07-20 13:12 ` Guenter Roeck
     [not found] ` <1437384726-24927-1-git-send-email-josh.wu-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2015-07-20 16:42   ` Sebastian Reichel [this message]
2015-07-28  7:27     ` Nicolas Ferre
2015-08-05 18:04       ` Sebastian Reichel

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