From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v8 01/13] clk: qcom: Add support for GDSCs Date: Mon, 10 Aug 2015 23:59:23 -0700 Message-ID: <20150811065923.GC2839@codeaurora.org> References: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org> <1438857474-20262-2-git-send-email-rnayak@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:33247 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933501AbbHKG7Y (ORCPT ); Tue, 11 Aug 2015 02:59:24 -0400 Content-Disposition: inline In-Reply-To: <1438857474-20262-2-git-send-email-rnayak@codeaurora.org> Sender: linux-pm-owner@vger.kernel.org List-Id: linux-pm@vger.kernel.org To: Rajendra Nayak Cc: mturquette@baylibre.com, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, georgi.djakov@linaro.org, svarbanov@mm-sol.com, srinivas.kandagatla@linaro.org, sviau@codeaurora.org On 08/06, Rajendra Nayak wrote: > From: Stephen Boyd > > GDSCs (Global Distributed Switch Controllers) are responsible for > safely collapsing and restoring power to peripherals in the SoC. > These are best modelled as power domains using genpd and given > the registers are scattered throughout the clock controller register > space, its best to have the support added through the clock driver. > > Signed-off-by: Stephen Boyd > Signed-off-by: Rajendra Nayak > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project