* [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-11 1:16 ` Krzysztof Kozlowski
2015-12-10 16:58 ` [PATCH v5 2/7] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock Bartlomiej Zolnierkiewicz
` (6 subsequent siblings)
7 siblings, 1 reply; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie, Doug Anderson, Andreas Faerber
Add cluster regulator supply properties as a preparation to
adding generic cpufreq-dt driver support for Exynos542x and
Exynos5800 based boards.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
arch/arm/boot/dts/exynos5420-arndale-octa.dts | 8 ++++++++
arch/arm/boot/dts/exynos5420-peach-pit.dts | 8 ++++++++
arch/arm/boot/dts/exynos5420-smdk5420.dts | 8 ++++++++
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 8 ++++++++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 8 ++++++++
5 files changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 4ecef69..4229641 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -52,6 +52,14 @@
};
};
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
&usbdrd_dwc3_1 {
dr_mode = "host";
};
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 35cfb07..df071b33 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -143,6 +143,14 @@
vdd-supply = <&ldo9_reg>;
};
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
&dp {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index ac35aef..124a9ba 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -89,6 +89,14 @@
};
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
&dp {
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 9134217..1bd507b 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -67,6 +67,14 @@
<19200000>;
};
+&cpu0 {
+ cpu-supply = <&buck6_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck2_reg>;
+};
+
&hdmi {
status = "okay";
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7b018e4..2f6d8ac 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -137,6 +137,14 @@
vdd-supply = <&ldo9_reg>;
};
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
&dp {
status = "okay";
pinctrl-names = "default";
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties
2015-12-10 16:58 ` [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:16 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:16 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Viresh Kumar, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Add cluster regulator supply properties as a preparation to
> adding generic cpufreq-dt driver support for Exynos542x and
> Exynos5800 based boards.
>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Andreas Faerber <afaerber@suse.de>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/boot/dts/exynos5420-arndale-octa.dts | 8 ++++++++
> arch/arm/boot/dts/exynos5420-peach-pit.dts | 8 ++++++++
> arch/arm/boot/dts/exynos5420-smdk5420.dts | 8 ++++++++
> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 8 ++++++++
> arch/arm/boot/dts/exynos5800-peach-pi.dts | 8 ++++++++
> 5 files changed, 40 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v5 2/7] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
2015-12-10 16:58 ` [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-10 16:58 ` [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties Bartlomiej Zolnierkiewicz
` (5 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Lukasz Majewski, Kevin Hilman, Heiko Stuebner,
Javier Martinez Canillas, Anand Moon, linux-pm, Tomasz Figa,
linux-kernel, Chanwoo Choi, b.zolnierkie, Tobias Jakobi,
linux-arm-kernel, linux-samsung-soc
From: Thomas Abraham <thomas.ab@samsung.com>
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.
Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@baylibre.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
drivers/clk/samsung/clk-exynos5420.c | 58 ++++++++++++++++++++++++++++++++--
include/dt-bindings/clock/exynos5420.h | 2 ++
2 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 389af3c..2a92546 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -18,6 +18,7 @@
#include <linux/syscore_ops.h>
#include "clk.h"
+#include "clk-cpu.h"
#define APLL_LOCK 0x0
#define APLL_CON0 0x100
@@ -616,9 +617,11 @@ static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
MUX(0, "mout_mspll_kfc", mout_mspll_cpu_p, SRC_TOP7, 8, 2),
MUX(0, "mout_mspll_cpu", mout_mspll_cpu_p, SRC_TOP7, 12, 2),
- MUX(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1),
+ MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
- MUX(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1),
+ MUX_F(0, "mout_kpll", mout_kpll_p, SRC_KFC, 0, 1,
+ CLK_SET_RATE_PARENT | CLK_RECALC_NEW_RATES, 0),
MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),
@@ -1246,6 +1249,50 @@ static struct samsung_pll_clock exynos5x_plls[nr_plls] __initdata = {
KPLL_CON0, NULL),
};
+#define E5420_EGL_DIV0(apll, pclk_dbg, atb, cpud) \
+ ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
+ ((cpud) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = {
+ { 1800000, E5420_EGL_DIV0(3, 7, 7, 4), },
+ { 1700000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1600000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1500000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1400000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1300000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1200000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1100000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1000000, E5420_EGL_DIV0(3, 6, 6, 2), },
+ { 900000, E5420_EGL_DIV0(3, 6, 6, 2), },
+ { 800000, E5420_EGL_DIV0(3, 5, 5, 2), },
+ { 700000, E5420_EGL_DIV0(3, 5, 5, 2), },
+ { 600000, E5420_EGL_DIV0(3, 4, 4, 2), },
+ { 500000, E5420_EGL_DIV0(3, 3, 3, 2), },
+ { 400000, E5420_EGL_DIV0(3, 3, 3, 2), },
+ { 300000, E5420_EGL_DIV0(3, 3, 3, 2), },
+ { 200000, E5420_EGL_DIV0(3, 3, 3, 2), },
+ { 0 },
+};
+
+#define E5420_KFC_DIV(kpll, pclk, aclk) \
+ ((((kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
+
+static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = {
+ { 1300000, E5420_KFC_DIV(3, 5, 2), },
+ { 1200000, E5420_KFC_DIV(3, 5, 2), },
+ { 1100000, E5420_KFC_DIV(3, 5, 2), },
+ { 1000000, E5420_KFC_DIV(3, 5, 2), },
+ { 900000, E5420_KFC_DIV(3, 5, 2), },
+ { 800000, E5420_KFC_DIV(3, 5, 2), },
+ { 700000, E5420_KFC_DIV(3, 4, 2), },
+ { 600000, E5420_KFC_DIV(3, 4, 2), },
+ { 500000, E5420_KFC_DIV(3, 4, 2), },
+ { 400000, E5420_KFC_DIV(3, 3, 2), },
+ { 300000, E5420_KFC_DIV(3, 3, 2), },
+ { 200000, E5420_KFC_DIV(3, 3, 2), },
+ { 0 },
+};
+
static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
{ },
@@ -1310,6 +1357,13 @@ static void __init exynos5x_clk_init(struct device_node *np,
ARRAY_SIZE(exynos5800_gate_clks));
}
+ exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+ mout_cpu_p[0], mout_cpu_p[1], 0x200,
+ exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+ exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
+ mout_kfc_p[0], mout_kfc_p[1], 0x28200,
+ exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
+
exynos5420_clk_sleep_init();
samsung_clk_of_add_provider(np, ctx);
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 99da0d1..dde9664 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -25,6 +25,8 @@
#define CLK_FOUT_MPLL 10
#define CLK_FOUT_BPLL 11
#define CLK_FOUT_KPLL 12
+#define CLK_ARM_CLK 13
+#define CLK_KFC_CLK 14
/* gate for special clocks (sclk) */
#define CLK_SCLK_UART0 128
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
2015-12-10 16:58 ` [PATCH v5 1/7] ARM: dts: Exynos542x/5800: add cluster regulator supply properties Bartlomiej Zolnierkiewicz
2015-12-10 16:58 ` [PATCH v5 2/7] clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-11 1:17 ` Krzysztof Kozlowski
` (2 more replies)
2015-12-10 16:58 ` [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420 Bartlomiej Zolnierkiewicz
` (4 subsequent siblings)
7 siblings, 3 replies; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie, Doug Anderson, Andreas Faerber
From: Thomas Abraham <thomas.ab@samsung.com>
For Exynos542x/5800 platforms, add CPU operating points
for migrating from Exynos specific cpufreq driver to using
generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5420 support from the original patch
- merged Exynos5422 fixes from Ben
Changes by Ben Gamari:
- Port to operating-points-v2
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Gamari <ben@smart-cactus.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
arch/arm/boot/dts/exynos5420.dtsi | 122 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 +++
2 files changed, 132 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 48a0a55..616c2d0 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -50,6 +50,116 @@
usbdrdphy1 = &usbdrd_phy1;
};
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp@1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1250000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <1212500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <1175000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <1137500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-microvolt = <1112500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1300000000 {
+ opp-hz = /bits/ 64 <1300000000>;
+ opp-microvolt = <1062500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1037500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1100000000 {
+ opp-hz = /bits/ 64 <1100000000>;
+ opp-microvolt = <1012500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = < 987500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-microvolt = < 962500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = < 937500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = < 912500>;
+ clock-latency-ns = <140000>;
+ };
+ };
+
+ cpu1_opp_table: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+ opp@1300000000 {
+ opp-hz = /bits/ 64 <1300000000>;
+ opp-microvolt = <1275000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1212500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1100000000 {
+ opp-hz = /bits/ 64 <1100000000>;
+ opp-microvolt = <1162500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <1112500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-microvolt = <1062500>;
+ clock-latency-ns = <140000>;
+ };
+ opp@800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1025000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <937500>;
+ clock-latency-ns = <140000>;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -58,8 +168,11 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
+ clocks = <&clock CLK_ARM_CLK>;
+ clock-names = "cpu-cluster.0";
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@1 {
@@ -68,6 +181,7 @@
reg = <0x1>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@2 {
@@ -76,6 +190,7 @@
reg = <0x2>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@3 {
@@ -84,14 +199,18 @@
reg = <0x3>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
+ clocks = <&clock CLK_KFC_CLK>;
+ clock-names = "cpu-cluster.1";
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
cpu5: cpu@101 {
@@ -100,6 +219,7 @@
reg = <0x101>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
cpu6: cpu@102 {
@@ -108,6 +228,7 @@
reg = <0x102>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
cpu7: cpu@103 {
@@ -116,6 +237,7 @@
reg = <0x103>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
};
diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index b7f60c8..9a5131d 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -20,8 +20,10 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
+ clocks = <&clock CLK_KFC_CLK>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
&cpu1 {
@@ -30,6 +32,7 @@
reg = <0x101>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
&cpu2 {
@@ -38,6 +41,7 @@
reg = <0x102>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
&cpu3 {
@@ -46,14 +50,17 @@
reg = <0x103>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
+ operating-points-v2 = <&cpu1_opp_table>;
};
&cpu4 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
+ clocks = <&clock CLK_ARM_CLK>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
&cpu5 {
@@ -62,6 +69,7 @@
reg = <0x1>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
&cpu6 {
@@ -70,6 +78,7 @@
reg = <0x2>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
&cpu7 {
@@ -78,4 +87,5 @@
reg = <0x3>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-10 16:58 ` [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:17 ` Krzysztof Kozlowski
2015-12-11 3:16 ` Viresh Kumar
2015-12-11 4:39 ` Viresh Kumar
2 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:17 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Viresh Kumar, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham <thomas.ab@samsung.com>
>
> For Exynos542x/5800 platforms, add CPU operating points
> for migrating from Exynos specific cpufreq driver to using
> generic cpufreq driver.
>
> Changes by Bartlomiej:
> - split Exynos5420 support from the original patch
> - merged Exynos5422 fixes from Ben
>
> Changes by Ben Gamari:
> - Port to operating-points-v2
>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Andreas Faerber <afaerber@suse.de>
> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Ben Gamari <ben@smart-cactus.org>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/boot/dts/exynos5420.dtsi | 122 +++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/exynos5422-cpus.dtsi | 10 +++
> 2 files changed, 132 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-10 16:58 ` [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties Bartlomiej Zolnierkiewicz
2015-12-11 1:17 ` Krzysztof Kozlowski
@ 2015-12-11 3:16 ` Viresh Kumar
2015-12-11 3:25 ` Javier Martinez Canillas
2015-12-11 4:39 ` Viresh Kumar
2 siblings, 1 reply; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 3:16 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Krzysztof Kozlowski, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 10-12-15, 17:58, Bartlomiej Zolnierkiewicz wrote:
> diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
> index b7f60c8..9a5131d 100644
> --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
> @@ -20,8 +20,10 @@
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x100>;
> + clocks = <&clock CLK_KFC_CLK>;
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> + operating-points-v2 = <&cpu1_opp_table>;
> };
Why do you need to update this file? This file is included by
exynos5422-odroidxu3-common.dtsi, which already inherits cpus nodes
from exynos5800.dtsi (which inherits exynos5420.dtsi).
i.e. operating-points-v2 should already be set.
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 3:16 ` Viresh Kumar
@ 2015-12-11 3:25 ` Javier Martinez Canillas
2015-12-11 3:32 ` Viresh Kumar
0 siblings, 1 reply; 26+ messages in thread
From: Javier Martinez Canillas @ 2015-12-11 3:25 UTC (permalink / raw)
To: Viresh Kumar, Bartlomiej Zolnierkiewicz
Cc: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Krzysztof Kozlowski, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Tobias Jakobi, Anand Moon, linux-samsung-soc, linux-pm,
linux-arm-kernel, linux-kernel, Doug Anderson, Andreas Faerber
Hello Viresh,
On 12/11/2015 12:16 AM, Viresh Kumar wrote:
> On 10-12-15, 17:58, Bartlomiej Zolnierkiewicz wrote:
>> diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> index b7f60c8..9a5131d 100644
>> --- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> +++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
>> @@ -20,8 +20,10 @@
>> device_type = "cpu";
>> compatible = "arm,cortex-a7";
>> reg = <0x100>;
>> + clocks = <&clock CLK_KFC_CLK>;
>> clock-frequency = <1000000000>;
>> cci-control-port = <&cci_control0>;
>> + operating-points-v2 = <&cpu1_opp_table>;
>> };
>
> Why do you need to update this file? This file is included by
> exynos5422-odroidxu3-common.dtsi, which already inherits cpus nodes
> from exynos5800.dtsi (which inherits exynos5420.dtsi).
>
> i.e. operating-points-v2 should already be set.
>
The problem is that the big and LITTLE cores have different ordering per SoCs:
- Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
- Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)
So the OPP tables are set in this DTSI file, to prevent the OPP tables
in the Exynos5422 to be inverted for the cluster 0 and 1.
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 3:25 ` Javier Martinez Canillas
@ 2015-12-11 3:32 ` Viresh Kumar
2015-12-11 4:00 ` Krzysztof Kozlowski
0 siblings, 1 reply; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 3:32 UTC (permalink / raw)
To: Javier Martinez Canillas
Cc: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Krzysztof Kozlowski,
Ben Gamari, Tomasz Figa, Lukasz Majewski, Heiko Stuebner,
Chanwoo Choi, Kevin Hilman, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 11-12-15, 00:25, Javier Martinez Canillas wrote:
> The problem is that the big and LITTLE cores have different ordering per SoCs:
>
> - Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
> - Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)
>
> So the OPP tables are set in this DTSI file, to prevent the OPP tables
> in the Exynos5422 to be inverted for the cluster 0 and 1.
Oh dude, that's really *ugly*. :)
Reusing files/definitions is fine to the point where things are
readable. But you have screwed it up so very badly.
Over that, why can't you keep cpu0-3 as A7 and 4-7 as a15 for all the
cases? The only worrying thing for you should be that CPU0 within the
kenrel should be controllable, right? i.e. you want a A15 to boot 5800
and A7 to boot 5422.
If yes, than you could have kept the CPUs in 5422 as:
0-3: A7
4-7: A15
and in 5420 as:
4-7: A15
0-3: A7
Wouldnt' that work ?
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 3:32 ` Viresh Kumar
@ 2015-12-11 4:00 ` Krzysztof Kozlowski
2015-12-11 4:13 ` Viresh Kumar
0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 4:00 UTC (permalink / raw)
To: Viresh Kumar, Javier Martinez Canillas
Cc: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Tobias Jakobi, Anand Moon, linux-samsung-soc, linux-pm,
linux-arm-kernel, linux-kernel, Doug Anderson, Andreas Faerber
On 11.12.2015 12:32, Viresh Kumar wrote:
> On 11-12-15, 00:25, Javier Martinez Canillas wrote:
>> The problem is that the big and LITTLE cores have different ordering per SoCs:
>>
>> - Exynos5420 and Exynos5800: cpu0-3 (Cortex-A15) and cpu4-7 (Coretx-A7)
>> - Exynos5422: cpu0-3 (Cortex-A7) and cpu4-7 (Cortex-A15)
>>
>> So the OPP tables are set in this DTSI file, to prevent the OPP tables
>> in the Exynos5422 to be inverted for the cluster 0 and 1.
>
> Oh dude, that's really *ugly*. :)
>
> Reusing files/definitions is fine to the point where things are
> readable. But you have screwed it up so very badly.
>
> Over that, why can't you keep cpu0-3 as A7 and 4-7 as a15 for all the
> cases? The only worrying thing for you should be that CPU0 within the
> kenrel should be controllable, right? i.e. you want a A15 to boot 5800
> and A7 to boot 5422.
>
> If yes, than you could have kept the CPUs in 5422 as:
> 0-3: A7
> 4-7: A15
>
> and in 5420 as:
> 4-7: A15
> 0-3: A7
>
> Wouldnt' that work ?
It wasn't working like this. The cpu0 got the index from booting cpu, so
on 5420 cpu0 was A15 and on 5422 it was A7.
Maybe I am not aware of some changes recently in the kernel but how do
you want to assign the booting CPU proper number (not CPU0)?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:00 ` Krzysztof Kozlowski
@ 2015-12-11 4:13 ` Viresh Kumar
2015-12-11 4:18 ` Krzysztof Kozlowski
0 siblings, 1 reply; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 4:13 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Javier Martinez Canillas, Bartlomiej Zolnierkiewicz,
Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Ben Gamari, Tomasz Figa, Lukasz Majewski,
Heiko Stuebner, Chanwoo Choi, Kevin Hilman, Tobias Jakobi,
Anand Moon, linux-samsung-soc, linux-pm, linux-arm-kernel,
linux-kernel, Doug Anderson, Andreas Faerber
On 11-12-15, 13:00, Krzysztof Kozlowski wrote:
> It wasn't working like this. The cpu0 got the index from booting cpu, so
> on 5420 cpu0 was A15 and on 5422 it was A7.
>
> Maybe I am not aware of some changes recently in the kernel but how do
> you want to assign the booting CPU proper number (not CPU0)?
Okay, this is how it works and I don't think you need to change the
order of CPUs based on machines.
The boot CPU isn't controlled by the DT file but your bootloader, so
it will be A15 on 5420 and A7 on 5422.
Now if you keep the order in DT as: 0-3 A7 and 4-7 A15 irrespective of
the SoCs, then this is how they will be assigned.
Linux CPU numbers Actual CPU assigned to them
5420 5422
CPU0 A15-0 (boot) A7-0 (boot)
CPU1 A7-0 A7-1
CPU2 A7-1 A7-2
CPU3 A7-2 A7-3
CPU4 A7-3 A15-0
CPU5 A15-1 A15-1
CPU6 A15-2 A15-2
CPU7 A15-3 A15-3
This happens because all non-boot CPUs will be added in the order they
are present in DT.
Now, there should be no *real* reason for you to want your CPUs to be
always contiguous, isn't it?
In the case of 5420, cpufreq will show related CPUs as:
Policy0: CPU0,5-7, Policy1: CPU1-4
and in the case of 5422, cpufreq will show related CPUs as:
Policy0: CPU0-3, Policy1: CPU4-7
And I think you should really fix this now..
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:13 ` Viresh Kumar
@ 2015-12-11 4:18 ` Krzysztof Kozlowski
2015-12-11 4:38 ` Viresh Kumar
0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 4:18 UTC (permalink / raw)
To: Viresh Kumar
Cc: Javier Martinez Canillas, Bartlomiej Zolnierkiewicz,
Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Ben Gamari, Tomasz Figa, Lukasz Majewski,
Heiko Stuebner, Chanwoo Choi, Kevin Hilman, Tobias Jakobi,
Anand Moon, linux-samsung-soc, linux-pm, linux-arm-kernel,
linux-kernel, Doug Anderson, Andreas Faerber
On 11.12.2015 13:13, Viresh Kumar wrote:
> On 11-12-15, 13:00, Krzysztof Kozlowski wrote:
>> It wasn't working like this. The cpu0 got the index from booting cpu, so
>> on 5420 cpu0 was A15 and on 5422 it was A7.
>>
>> Maybe I am not aware of some changes recently in the kernel but how do
>> you want to assign the booting CPU proper number (not CPU0)?
>
> Okay, this is how it works and I don't think you need to change the
> order of CPUs based on machines.
>
> The boot CPU isn't controlled by the DT file but your bootloader, so
> it will be A15 on 5420 and A7 on 5422.
>
> Now if you keep the order in DT as: 0-3 A7 and 4-7 A15 irrespective of
> the SoCs, then this is how they will be assigned.
>
> Linux CPU numbers Actual CPU assigned to them
> 5420 5422
>
> CPU0 A15-0 (boot) A7-0 (boot)
> CPU1 A7-0 A7-1
> CPU2 A7-1 A7-2
> CPU3 A7-2 A7-3
> CPU4 A7-3 A15-0
> CPU5 A15-1 A15-1
> CPU6 A15-2 A15-2
> CPU7 A15-3 A15-3
>
> This happens because all non-boot CPUs will be added in the order they
> are present in DT.
>
> Now, there should be no *real* reason for you to want your CPUs to be
> always contiguous, isn't it?
>
> In the case of 5420, cpufreq will show related CPUs as:
> Policy0: CPU0,5-7, Policy1: CPU1-4
>
> and in the case of 5422, cpufreq will show related CPUs as:
> Policy0: CPU0-3, Policy1: CPU4-7
>
> And I think you should really fix this now..
We had such configuration before (before df09df6f9ac3). I don't see any
benefit in what you described. Where is the "thing" to be fixed? It is
mixed up. The contiguous ordering is easier to read and more natural.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:18 ` Krzysztof Kozlowski
@ 2015-12-11 4:38 ` Viresh Kumar
2015-12-11 4:53 ` Krzysztof Kozlowski
2015-12-11 4:53 ` Javier Martinez Canillas
0 siblings, 2 replies; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 4:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring
Cc: Javier Martinez Canillas, Bartlomiej Zolnierkiewicz,
Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Ben Gamari, Tomasz Figa, Lukasz Majewski,
Heiko Stuebner, Chanwoo Choi, Kevin Hilman, Tobias Jakobi,
Anand Moon, linux-samsung-soc, linux-pm, linux-arm-kernel,
linux-kernel, Doug Anderson, Andreas Faerber
On 11-12-15, 13:18, Krzysztof Kozlowski wrote:
> We had such configuration before (before df09df6f9ac3). I don't see any
> benefit in what you described. Where is the "thing" to be fixed? It is
> mixed up. The contiguous ordering is easier to read and more natural.
This is what you are doing today (keeping on one CPU per cluster to
simplify it):
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
};
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
};
Then you overwrite it with:
&cpu0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
clock-frequency = <1000000000>;
cci-control-port = <&cci_control0>;
};
&cpu4 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
clock-frequency = <1800000000>;
cci-control-port = <&cci_control1>;
};
Don't you think this isn't the right way of solving problems?
The DT overwrite feature isn't there to do such kind of stuff, though
it doesn't stop you from doing that.
Either you should keep separate paths for both the SoCs, or can solve
it the way I suggested earlier.
This came up because in the current series you are doing this:
cpu0: cpu@0 {
compatible = "arm,cortex-a15";
operating-points-v2 = <&cpu0_opp_table>;
};
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
operating-points-v2 = <&cpu1_opp_table>;
};
Then you overwrite it with:
&cpu0 {
compatible = "arm,cortex-a7";
operating-points-v2 = <&cpu1_opp_table>;
};
&cpu4 {
compatible = "arm,cortex-a15";
operating-points-v2 = <&cpu0_opp_table>;
};
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:38 ` Viresh Kumar
@ 2015-12-11 4:53 ` Krzysztof Kozlowski
2015-12-11 4:53 ` Javier Martinez Canillas
1 sibling, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 4:53 UTC (permalink / raw)
To: Viresh Kumar, Rob Herring
Cc: Javier Martinez Canillas, Bartlomiej Zolnierkiewicz,
Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Ben Gamari, Tomasz Figa, Lukasz Majewski,
Heiko Stuebner, Chanwoo Choi, Kevin Hilman, Tobias Jakobi,
Anand Moon, linux-samsung-soc, linux-pm, linux-arm-kernel,
linux-kernel, Doug Anderson, Andreas Faerber
On 11.12.2015 13:38, Viresh Kumar wrote:
> On 11-12-15, 13:18, Krzysztof Kozlowski wrote:
>> We had such configuration before (before df09df6f9ac3). I don't see any
>> benefit in what you described. Where is the "thing" to be fixed? It is
>> mixed up. The contiguous ordering is easier to read and more natural.
>
> This is what you are doing today (keeping on one CPU per cluster to
> simplify it):
>
> cpu0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a15";
> reg = <0x0>;
> clock-frequency = <1800000000>;
> cci-control-port = <&cci_control1>;
> };
>
> cpu4: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x100>;
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> };
>
>
> Then you overwrite it with:
>
> &cpu0 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x100>;
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> };
>
> &cpu4 {
> device_type = "cpu";
> compatible = "arm,cortex-a15";
> reg = <0x0>;
> clock-frequency = <1800000000>;
> cci-control-port = <&cci_control1>;
> };
>
>
> Don't you think this isn't the right way of solving problems?
>
> The DT overwrite feature isn't there to do such kind of stuff, though
> it doesn't stop you from doing that.
This is quite ugly, indeed, and it is getting uglier :)... but it does
not violate the idea of DT to describe the hardware. Both hardware
descriptions - the 5420 and overridden - are entirely correct... because
the CPU ordering comes from booting sequence (actually code in IROM
decides according to pulled up GPIO gpg2-1).
> Either you should keep separate paths for both the SoCs,
I like that idea. That makes it much more readable. Thanks for feedback!
I will send a patch for that.
> or can solve
> it the way I suggested earlier.
>
> This came up because in the current series you are doing this:
>
> cpu0: cpu@0 {
> compatible = "arm,cortex-a15";
> operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu4: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> operating-points-v2 = <&cpu1_opp_table>;
> };
>
>
> Then you overwrite it with:
>
> &cpu0 {
> compatible = "arm,cortex-a7";
> operating-points-v2 = <&cpu1_opp_table>;
> };
>
> &cpu4 {
> compatible = "arm,cortex-a15";
> operating-points-v2 = <&cpu0_opp_table>;
> };
Yes, it is getting uglier with each change...
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:38 ` Viresh Kumar
2015-12-11 4:53 ` Krzysztof Kozlowski
@ 2015-12-11 4:53 ` Javier Martinez Canillas
2015-12-11 5:28 ` Krzysztof Kozlowski
1 sibling, 1 reply; 26+ messages in thread
From: Javier Martinez Canillas @ 2015-12-11 4:53 UTC (permalink / raw)
To: Viresh Kumar, Krzysztof Kozlowski, Rob Herring
Cc: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Tobias Jakobi, Anand Moon, linux-samsung-soc, linux-pm,
linux-arm-kernel, linux-kernel, Doug Anderson, Andreas Faerber
Hello Viresh,
On 12/11/2015 01:38 AM, Viresh Kumar wrote:
> On 11-12-15, 13:18, Krzysztof Kozlowski wrote:
>> We had such configuration before (before df09df6f9ac3). I don't see any
>> benefit in what you described. Where is the "thing" to be fixed? It is
>> mixed up. The contiguous ordering is easier to read and more natural.
>
> This is what you are doing today (keeping on one CPU per cluster to
> simplify it):
>
> cpu0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a15";
> reg = <0x0>;
> clock-frequency = <1800000000>;
> cci-control-port = <&cci_control1>;
> };
>
> cpu4: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x100>;
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> };
>
>
> Then you overwrite it with:
>
> &cpu0 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x100>;
> clock-frequency = <1000000000>;
> cci-control-port = <&cci_control0>;
> };
>
> &cpu4 {
> device_type = "cpu";
> compatible = "arm,cortex-a15";
> reg = <0x0>;
> clock-frequency = <1800000000>;
> cci-control-port = <&cci_control1>;
> };
>
>
> Don't you think this isn't the right way of solving problems?
>
> The DT overwrite feature isn't there to do such kind of stuff, though
> it doesn't stop you from doing that.
>
I still fail to understand why the override is not a good way to solve
the issue.
> Either you should keep separate paths for both the SoCs, or can solve
There's no point IMHO to duplicate the HW description since is the only
difference between the Exynos5422 and Exynos5800 SoCs AFAIK.
> it the way I suggested earlier.
>
As Krzysztof said, contiguous ordering is more natural and easier to
read and I agree with him.
> This came up because in the current series you are doing this:
>
> cpu0: cpu@0 {
> compatible = "arm,cortex-a15";
> operating-points-v2 = <&cpu0_opp_table>;
> };
>
> cpu4: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> operating-points-v2 = <&cpu1_opp_table>;
> };
>
>
> Then you overwrite it with:
>
> &cpu0 {
> compatible = "arm,cortex-a7";
> operating-points-v2 = <&cpu1_opp_table>;
But yes, I agree with you that the OPP tables names are misleading at the
very least for not saying wrong. So yes, either {cluster0,a7,kfc}_opp_table
as you suggest are much better possible names and the same for the a15 one.
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 4:53 ` Javier Martinez Canillas
@ 2015-12-11 5:28 ` Krzysztof Kozlowski
2015-12-11 5:41 ` Viresh Kumar
0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 5:28 UTC (permalink / raw)
To: Javier Martinez Canillas, Viresh Kumar, Rob Herring
Cc: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Tobias Jakobi, Anand Moon, linux-samsung-soc, linux-pm,
linux-arm-kernel, linux-kernel, Doug Anderson, Andreas Faerber
On 11.12.2015 13:53, Javier Martinez Canillas wrote:
> Hello Viresh,
>
> On 12/11/2015 01:38 AM, Viresh Kumar wrote:
>> On 11-12-15, 13:18, Krzysztof Kozlowski wrote:
>>> We had such configuration before (before df09df6f9ac3). I don't see any
>>> benefit in what you described. Where is the "thing" to be fixed? It is
>>> mixed up. The contiguous ordering is easier to read and more natural.
>>
>> This is what you are doing today (keeping on one CPU per cluster to
>> simplify it):
>>
>> cpu0: cpu@0 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <0x0>;
>> clock-frequency = <1800000000>;
>> cci-control-port = <&cci_control1>;
>> };
>>
>> cpu4: cpu@100 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a7";
>> reg = <0x100>;
>> clock-frequency = <1000000000>;
>> cci-control-port = <&cci_control0>;
>> };
>>
>>
>> Then you overwrite it with:
>>
>> &cpu0 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a7";
>> reg = <0x100>;
>> clock-frequency = <1000000000>;
>> cci-control-port = <&cci_control0>;
>> };
>>
>> &cpu4 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <0x0>;
>> clock-frequency = <1800000000>;
>> cci-control-port = <&cci_control1>;
>> };
>>
>>
>> Don't you think this isn't the right way of solving problems?
>>
>> The DT overwrite feature isn't there to do such kind of stuff, though
>> it doesn't stop you from doing that.
>>
>
> I still fail to understand why the override is not a good way to solve
> the issue.
>
>> Either you should keep separate paths for both the SoCs, or can solve
>
> There's no point IMHO to duplicate the HW description since is the only
> difference between the Exynos5422 and Exynos5800 SoCs AFAIK.
Actually I think there is no nice way of making this as separate paths.
As Javier's mentioned, there aren't many differences. Currently the CPU
ordering is the only difference in DT.
Making it as separate path would create hierarchy like:
- exynos5420-based-board.dts
\- include: exynos5420.dtsi
\- include: exynos5.dtsi
\- include: exynos5420-cpu.dtsi (the cpus are not in exynos5420.dtsi)
- exynos5422-based-board.dts
\- include: exynos5420.dtsi
\- include: exynos5.dtsi
\- include: exynos5422-cpu.dtsi (the cpus are not in exynos5420.dtsi)
which of course is okay... except we keep the definition of CPUs
completely outside of main Exynos5420 DTSI. Then we have to include both
DTSI for each new DTS.
Other idea is to create artificial "exynos5420-common":
- exynos5420-based-board.dts
\- include: exynos5420.dtsi
\- include: exynos5420-common.dtsi
\- include: exynos5.dtsi
\- include: exynos5420-cpu.dtsi
- exynos5422-based-board.dts
\- include: exynos5422.dtsi
\- include: exynos5420-common.dtsi
\- include: exynos5.dtsi
\- include: exynos5422-cpu.dtsi
This is also confusing...
Any third idea?
Best regards,
KRzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-11 5:28 ` Krzysztof Kozlowski
@ 2015-12-11 5:41 ` Viresh Kumar
0 siblings, 0 replies; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 5:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Javier Martinez Canillas, Rob Herring, Bartlomiej Zolnierkiewicz,
Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Ben Gamari, Tomasz Figa, Lukasz Majewski,
Heiko Stuebner, Chanwoo Choi, Kevin Hilman, Tobias Jakobi,
Anand Moon, linux-samsung-soc, linux-pm, linux-arm-kernel,
linux-kernel, Doug Anderson, Andreas Faerber
On 11-12-15, 14:28, Krzysztof Kozlowski wrote:
> Actually I think there is no nice way of making this as separate paths.
> As Javier's mentioned, there aren't many differences. Currently the CPU
> ordering is the only difference in DT.
>
> Making it as separate path would create hierarchy like:
> - exynos5420-based-board.dts
> \- include: exynos5420.dtsi
> \- include: exynos5.dtsi
> \- include: exynos5420-cpu.dtsi (the cpus are not in exynos5420.dtsi)
>
> - exynos5422-based-board.dts
> \- include: exynos5420.dtsi
> \- include: exynos5.dtsi
> \- include: exynos5422-cpu.dtsi (the cpus are not in exynos5420.dtsi)
>
> which of course is okay... except we keep the definition of CPUs
> completely outside of main Exynos5420 DTSI. Then we have to include both
> DTSI for each new DTS.
So what? There isn't anything wrong in this case and is just the right
thing to do, IMHO. We have just kept the CPU devices separately,
simple.
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties
2015-12-10 16:58 ` [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties Bartlomiej Zolnierkiewicz
2015-12-11 1:17 ` Krzysztof Kozlowski
2015-12-11 3:16 ` Viresh Kumar
@ 2015-12-11 4:39 ` Viresh Kumar
2 siblings, 0 replies; 26+ messages in thread
From: Viresh Kumar @ 2015-12-11 4:39 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Krzysztof Kozlowski, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 10-12-15, 17:58, Bartlomiej Zolnierkiewicz wrote:
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 48a0a55..616c2d0 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -50,6 +50,116 @@
> usbdrdphy1 = &usbdrd_phy1;
> };
>
> + cpu0_opp_table: opp_table0 {
Over and above what we are discussing in this thread, this should be
named cluster0_opp_table or cluster_a7_opp_table, not cpu0 as the
other one is never for cpu1 but cpu4.
--
viresh
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
` (2 preceding siblings ...)
2015-12-10 16:58 ` [PATCH v5 3/7] ARM: dts: Exynos542x/5800: add CPU OPP properties Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-11 1:18 ` Krzysztof Kozlowski
2015-12-10 16:58 ` [PATCH v5 5/7] clk: samsung: exynos5422/5800: fix cpu clock configuration data Bartlomiej Zolnierkiewicz
` (3 subsequent siblings)
7 siblings, 1 reply; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie
The new CPU clock type allows the use of cpufreq-dt driver
for Exynos5420.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 1c47aee..7a89c9d 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -230,6 +230,9 @@ static const struct of_device_id exynos_cpufreq_matches[] = {
{ .compatible = "samsung,exynos4212", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos4412", .data = "cpufreq-dt" },
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
+#ifndef CONFIG_BL_SWITCHER
+ { .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+#endif
{ /* sentinel */ }
};
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420
2015-12-10 16:58 ` [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420 Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:18 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:18 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Viresh Kumar, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> The new CPU clock type allows the use of cpufreq-dt driver
> for Exynos5420.
>
> Cc: Tomasz Figa <tomasz.figa@gmail.com>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v5 5/7] clk: samsung: exynos5422/5800: fix cpu clock configuration data
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
` (3 preceding siblings ...)
2015-12-10 16:58 ` [PATCH v5 4/7] ARM: Exynos: use generic cpufreq driver for Exynos5420 Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-10 16:58 ` [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP Bartlomiej Zolnierkiewicz
` (2 subsequent siblings)
7 siblings, 0 replies; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie
Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).
Based on Hardkernel's kernel for ODROID-XU3 board.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@baylibre.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
drivers/clk/samsung/clk-exynos5420.c | 36 +++++++++++++++++++++++++++++++++---
1 file changed, 33 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 2a92546..837329d 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1274,10 +1274,34 @@ static const struct exynos_cpuclk_cfg_data exynos5420_eglclk_d[] __initconst = {
{ 0 },
};
+static const struct exynos_cpuclk_cfg_data exynos5800_eglclk_d[] __initconst = {
+ { 2000000, E5420_EGL_DIV0(3, 7, 7, 4), },
+ { 1900000, E5420_EGL_DIV0(3, 7, 7, 4), },
+ { 1800000, E5420_EGL_DIV0(3, 7, 7, 4), },
+ { 1700000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1600000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1500000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1400000, E5420_EGL_DIV0(3, 7, 7, 3), },
+ { 1300000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1200000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1100000, E5420_EGL_DIV0(3, 7, 7, 2), },
+ { 1000000, E5420_EGL_DIV0(3, 7, 6, 2), },
+ { 900000, E5420_EGL_DIV0(3, 7, 6, 2), },
+ { 800000, E5420_EGL_DIV0(3, 7, 5, 2), },
+ { 700000, E5420_EGL_DIV0(3, 7, 5, 2), },
+ { 600000, E5420_EGL_DIV0(3, 7, 4, 2), },
+ { 500000, E5420_EGL_DIV0(3, 7, 3, 2), },
+ { 400000, E5420_EGL_DIV0(3, 7, 3, 2), },
+ { 300000, E5420_EGL_DIV0(3, 7, 3, 2), },
+ { 200000, E5420_EGL_DIV0(3, 7, 3, 2), },
+ { 0 },
+};
+
#define E5420_KFC_DIV(kpll, pclk, aclk) \
((((kpll) << 24) | ((pclk) << 20) | ((aclk) << 4)))
static const struct exynos_cpuclk_cfg_data exynos5420_kfcclk_d[] __initconst = {
+ { 1400000, E5420_KFC_DIV(3, 5, 3), }, /* for Exynos5800 */
{ 1300000, E5420_KFC_DIV(3, 5, 2), },
{ 1200000, E5420_KFC_DIV(3, 5, 2), },
{ 1100000, E5420_KFC_DIV(3, 5, 2), },
@@ -1357,9 +1381,15 @@ static void __init exynos5x_clk_init(struct device_node *np,
ARRAY_SIZE(exynos5800_gate_clks));
}
- exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
- mout_cpu_p[0], mout_cpu_p[1], 0x200,
- exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+ if (soc == EXYNOS5420) {
+ exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+ mout_cpu_p[0], mout_cpu_p[1], 0x200,
+ exynos5420_eglclk_d, ARRAY_SIZE(exynos5420_eglclk_d), 0);
+ } else {
+ exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+ mout_cpu_p[0], mout_cpu_p[1], 0x200,
+ exynos5800_eglclk_d, ARRAY_SIZE(exynos5800_eglclk_d), 0);
+ }
exynos_register_cpu_clock(ctx, CLK_KFC_CLK, "kfcclk",
mout_kfc_p[0], mout_kfc_p[1], 0x28200,
exynos5420_kfcclk_d, ARRAY_SIZE(exynos5420_kfcclk_d), 0);
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
` (4 preceding siblings ...)
2015-12-10 16:58 ` [PATCH v5 5/7] clk: samsung: exynos5422/5800: fix cpu clock configuration data Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-11 1:27 ` Krzysztof Kozlowski
2015-12-10 16:58 ` [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800 Bartlomiej Zolnierkiewicz
2015-12-11 1:34 ` [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Krzysztof Kozlowski
7 siblings, 1 reply; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie, Doug Anderson, Andreas Faerber
Fix CPU operating points for Exynos5800 (it use different
voltages than Exynos5420 and supports additional frequencies).
However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
1400MHz OPP (for A7 cores) for now as they are not available
on all boards.
Based on Hardkernel's kernel for ODROID-XU3 board.
Changes by Ben Gamari:
- Port to operating-points-v2
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Gamari <ben@smart-cactus.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
arch/arm/boot/dts/exynos5800.dtsi | 108 ++++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi
index c0bb356..b3c16f6 100644
--- a/arch/arm/boot/dts/exynos5800.dtsi
+++ b/arch/arm/boot/dts/exynos5800.dtsi
@@ -23,6 +23,114 @@
compatible = "samsung,exynos5800-clock";
};
+&cpu0_opp_table {
+ opp@1700000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp@1600000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp@1500000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@1400000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@1300000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@1200000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@1100000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@1000000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@900000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@800000000 {
+ opp-microvolt = <900000>;
+ };
+ opp@700000000 {
+ opp-microvolt = <900000>;
+ };
+ opp@600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+};
+
+&cpu1_opp_table {
+ opp@1300000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp@1200000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp@1100000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp@1000000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@900000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@800000000 {
+ opp-microvolt = <1100000>;
+ };
+ opp@700000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@600000000 {
+ opp-microvolt = <1000000>;
+ };
+ opp@500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+ opp@200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <140000>;
+ };
+};
+
&mfc {
compatible = "samsung,mfc-v8";
};
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP
2015-12-10 16:58 ` [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:27 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:27 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Viresh Kumar, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
Doug Anderson, Andreas Faerber
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Fix CPU operating points for Exynos5800 (it use different
> voltages than Exynos5420 and supports additional frequencies).
> However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
> 1400MHz OPP (for A7 cores) for now as they are not available
> on all boards.
>
> Based on Hardkernel's kernel for ODROID-XU3 board.
>
> Changes by Ben Gamari:
> - Port to operating-points-v2
>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Andreas Faerber <afaerber@suse.de>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Ben Gamari <ben@smart-cactus.org>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/boot/dts/exynos5800.dtsi | 108 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 108 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
` (5 preceding siblings ...)
2015-12-10 16:58 ` [PATCH v5 6/7] ARM: dts: Exynos5800: fix CPU OPP Bartlomiej Zolnierkiewicz
@ 2015-12-10 16:58 ` Bartlomiej Zolnierkiewicz
2015-12-11 1:27 ` Krzysztof Kozlowski
2015-12-11 1:34 ` [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Krzysztof Kozlowski
7 siblings, 1 reply; 26+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2015-12-10 16:58 UTC (permalink / raw)
To: Thomas Abraham, Sylwester Nawrocki, Mike Turquette, Kukjin Kim,
Kukjin Kim, Viresh Kumar, Krzysztof Kozlowski, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel,
b.zolnierkie
The new CPU clock type allows the use of generic cpufreq-dt driver
for Exynos5422/5800.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
arch/arm/mach-exynos/exynos.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 7a89c9d..cec8aeb 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -232,6 +232,7 @@ static const struct of_device_id exynos_cpufreq_matches[] = {
{ .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
#ifndef CONFIG_BL_SWITCHER
{ .compatible = "samsung,exynos5420", .data = "cpufreq-dt" },
+ { .compatible = "samsung,exynos5800", .data = "cpufreq-dt" },
#endif
{ /* sentinel */ }
};
--
1.9.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800
2015-12-10 16:58 ` [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800 Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:27 ` Krzysztof Kozlowski
0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:27 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Thomas Abraham, Sylwester Nawrocki,
Mike Turquette, Kukjin Kim, Kukjin Kim, Viresh Kumar, Ben Gamari
Cc: Tomasz Figa, Lukasz Majewski, Heiko Stuebner, Chanwoo Choi,
Kevin Hilman, Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> The new CPU clock type allows the use of generic cpufreq-dt driver
> for Exynos5422/5800.
>
> Cc: Tomasz Figa <tomasz.figa@gmail.com>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms
2015-12-10 16:58 [PATCH v5 0/7] cpufreq: add generic cpufreq driver support for Exynos542x/5800 platforms Bartlomiej Zolnierkiewicz
` (6 preceding siblings ...)
2015-12-10 16:58 ` [PATCH v5 7/7] ARM: Exynos: use generic cpufreq driver for Exynos5422/5800 Bartlomiej Zolnierkiewicz
@ 2015-12-11 1:34 ` Krzysztof Kozlowski
7 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2015-12-11 1:34 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Sylwester Nawrocki, Mike Turquette,
Kukjin Kim, Kukjin Kim
Cc: Thomas Abraham, Viresh Kumar, Ben Gamari, Tomasz Figa,
Lukasz Majewski, Heiko Stuebner, Chanwoo Choi, Kevin Hilman,
Javier Martinez Canillas, Tobias Jakobi, Anand Moon,
linux-samsung-soc, linux-pm, linux-arm-kernel, linux-kernel
On 11.12.2015 01:58, Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> This patch series adds generic cpufreq-dt driver support for
> Exynos542x/5800 (using the new CPU clock type which allows it).
>
> It has been tested on Exynos5422 based ODROID-XU3 Lite board.
>
> Depends on:
> - next-20151124 branch of linux-next kernel tree
Bartlomiej,
Thanks for update! Nice work. Everything looks good for me. As for
merging, my last pull requests are waiting on Kukjin, so I am not
grabbing more stuff till they get in. This (I hope) should happen this
weekend so:
1. Either Kukjin will pick it up directly,
2. I could apply this later and hopefully still send them for v4.5.
Sylwester,
However in case of any delay, how about merging clock changes now
through clock tree and preparing a tag for samsung-soc? If the series
won't make till v4.5 then at least dependency would be merged.
In that case you could also pick the first patch from Marek's GSCL clock.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 26+ messages in thread