From: Eduardo Valentin <edubezval@gmail.com>
To: Wei Ni <wni@nvidia.com>
Cc: rui.zhang@intel.com, thierry.reding@gmail.com,
MLongnecker@nvidia.com, swarren@wwwdotorg.org,
mikko.perttunen@kapsi.fi, linux-tegra@vger.kernel.org,
linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V7 05/12] thermal: tegra: add Tegra210 specific SOC_THERM driver
Date: Mon, 14 Mar 2016 11:57:40 -0700 [thread overview]
Message-ID: <20160314185739.GA1872@localhost.localdomain> (raw)
In-Reply-To: <1457665825-29837-1-git-send-email-wni@nvidia.com>
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On Fri, Mar 11, 2016 at 11:10:25AM +0800, Wei Ni wrote:
> Add Tegra210 specific SOC_THERM driver.
>
> Signed-off-by: Wei Ni <wni@nvidia.com>
> ---
> drivers/thermal/tegra/Makefile | 1 +
> drivers/thermal/tegra/soctherm-fuse.c | 11 ++
> drivers/thermal/tegra/soctherm.c | 6 ++
> drivers/thermal/tegra/soctherm.h | 4 +
> drivers/thermal/tegra/tegra210-soctherm.c | 173 ++++++++++++++++++++++++++++++
No Kconfig change?
> 5 files changed, 195 insertions(+)
> create mode 100644 drivers/thermal/tegra/tegra210-soctherm.c
>
> diff --git a/drivers/thermal/tegra/Makefile b/drivers/thermal/tegra/Makefile
> index d5fb15377b97..bf9e028eba28 100644
> --- a/drivers/thermal/tegra/Makefile
> +++ b/drivers/thermal/tegra/Makefile
> @@ -2,3 +2,4 @@ obj-$(CONFIG_TEGRA_SOCTHERM) += tegra-soctherm.o
>
> tegra-soctherm-y := soctherm.o soctherm-fuse.o
> tegra-soctherm-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124-soctherm.o
> +tegra-soctherm-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210-soctherm.o
> diff --git a/drivers/thermal/tegra/soctherm-fuse.c b/drivers/thermal/tegra/soctherm-fuse.c
> index 931c299ab0e8..29963180c453 100644
> --- a/drivers/thermal/tegra/soctherm-fuse.c
> +++ b/drivers/thermal/tegra/soctherm-fuse.c
> @@ -28,7 +28,18 @@
> #define FUSE_TSENSOR_COMMON 0x180
>
> /*
> + * Tegra210: Layout of bits in FUSE_TSENSOR_COMMON:
> + * 3 2 1 0
> + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
> + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
> + * | BASE_FT | BASE_CP | SHFT_FT | SHIFT_CP |
> + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
> + *
> * Tegra12x, etc:
> + * In chips prior to Tegra210, this fuse was incorrectly sized as 26 bits,
> + * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits
> + * were obtained via the FUSE_SPARE_REALIGNMENT_REG register [5:0].
> + *
> * FUSE_TSENSOR_COMMON:
> * 3 2 1 0
> * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
> diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
> index f56e5a11384e..52a33760e8e8 100644
> --- a/drivers/thermal/tegra/soctherm.c
> +++ b/drivers/thermal/tegra/soctherm.c
> @@ -147,6 +147,12 @@ static const struct of_device_id tegra_soctherm_of_match[] = {
> .data = &tegra124_soctherm,
> },
> #endif
> +#ifdef CONFIG_ARCH_TEGRA_210_SOC
> + {
> + .compatible = "nvidia,tegra210-soctherm",
> + .data = &tegra210_soctherm,
> + },
> +#endif
> { },
> };
> MODULE_DEVICE_TABLE(of, tegra_soctherm_of_match);
> diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/soctherm.h
> index f80ee1492ddb..69d317269af1 100644
> --- a/drivers/thermal/tegra/soctherm.h
> +++ b/drivers/thermal/tegra/soctherm.h
> @@ -106,5 +106,9 @@ int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
> extern const struct tegra_soctherm_soc tegra124_soctherm;
> #endif
>
> +#ifdef CONFIG_ARCH_TEGRA_210_SOC
> +extern const struct tegra_soctherm_soc tegra210_soctherm;
> +#endif
Is CONFIG_ARCH_TEGRA_210_SOC going to be tristate?
If only bool, do you need to make the symbol extern?
> --
> 1.9.1
>
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next prev parent reply other threads:[~2016-03-14 18:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-11 3:10 [PATCH V7 05/12] thermal: tegra: add Tegra210 specific SOC_THERM driver Wei Ni
2016-03-14 18:57 ` Eduardo Valentin [this message]
[not found] ` <20160314185739.GA1872-bi+AKbBUZKY6gyzm1THtWbp2dZbC/Bob@public.gmane.org>
2016-03-15 6:59 ` Wei Ni
2016-03-15 19:54 ` Eduardo Valentin
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