From mboxrd@z Thu Jan 1 00:00:00 1970 From: Patrick Bellasi Subject: Re: [PATCH v5 1/4] sched/fair: add util_est on top of PELT Date: Wed, 7 Mar 2018 11:47:11 +0000 Message-ID: <20180307114711.GB2211@e110439-lin> References: <20180222170153.673-1-patrick.bellasi@arm.com> <20180222170153.673-2-patrick.bellasi@arm.com> <20180306190241.GH25201@hirez.programming.kicks-ass.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20180306190241.GH25201@hirez.programming.kicks-ass.net> Sender: linux-kernel-owner@vger.kernel.org To: Peter Zijlstra Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ingo Molnar , "Rafael J . Wysocki" , Viresh Kumar , Vincent Guittot , Paul Turner , Dietmar Eggemann , Morten Rasmussen , Juri Lelli , Todd Kjos , Joel Fernandes , Steve Muckle List-Id: linux-pm@vger.kernel.org On 06-Mar 20:02, Peter Zijlstra wrote: > On Thu, Feb 22, 2018 at 05:01:50PM +0000, Patrick Bellasi wrote: > > +struct util_est { > > + unsigned int enqueued; > > + unsigned int ewma; > > +#define UTIL_EST_WEIGHT_SHIFT 2 > > +}; > > > + ue = READ_ONCE(p->se.avg.util_est); > > > + WRITE_ONCE(p->se.avg.util_est, ue); > > That is actually quite dodgy... and relies on the fact that we have the > 8 byte case in __write_once_size() and __read_once_size() > unconditionally. It then further relies on the compiler DTRT for 32bit > platforms, which is generating 2 32bit loads/stores. > > The advantage is of course that it will use single u64 loads/stores > where available. Yes, that's mainly an "optimization" for 64bit targets... but perhaps the benefits are negligible. Do you prefer to keep more "under control" the generated code by using two {READ,WRITE}_ONCEs? IMO here we can also go with just the WRITE_ONCEs. I don't see a case for the compiler to mangle load/store. While the WRITE_ONCE are still required to sync with non rq-lock serialized code. But... maybe I'm missing something... ? -- #include Patrick Bellasi