From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Georgi Djakov <georgi.djakov@linaro.org>
Cc: Rob Herring <robh@kernel.org>,
"open list:THERMAL" <linux-pm@vger.kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Michael Turquette <mturquette@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Saravana Kannan <skannan@codeaurora.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Amit Kucheria <amit.kucheria@linaro.org>,
seansw@qti.qualcomm.com, daidavid1@codeaurora.org,
Evan Green <evgreen@chromium.org>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Alexandre Bailon <abailon@baylibre.com>,
Arnd Bergmann <arnd@arndb.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
moderated list:ARM/FREESCAL
Subject: Re: [PATCH v7 2/8] dt-bindings: Introduce interconnect provider bindings
Date: Thu, 30 Aug 2018 09:47:04 +0200 [thread overview]
Message-ID: <20180830074704.56x5xzfhauhd7ncy@flea> (raw)
In-Reply-To: <ec22950d-ae18-0cec-3bef-a4840618eb7d@linaro.org>
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Hi,
On Wed, Aug 29, 2018 at 03:33:29PM +0300, Georgi Djakov wrote:
> On 08/27/2018 06:11 PM, Maxime Ripard wrote:
> > On Fri, Aug 24, 2018 at 10:35:23AM -0500, Rob Herring wrote:
> >> On Fri, Aug 24, 2018 at 9:51 AM Georgi Djakov <georgi.djakov@linaro.org> wrote:
> >>>
> >>> Hi Maxime,
> >>>
> >>> On 08/20/2018 06:32 PM, Maxime Ripard wrote:
> >>>> Hi Georgi,
> >>>>
> >>>> On Tue, Aug 07, 2018 at 05:54:38PM +0300, Georgi Djakov wrote:
> >>>>>> There is also a patch series from Maxime Ripard that's addressing the
> >>>>>> same general area. See "dt-bindings: Add a dma-parent property". We
> >>>>>> don't need multiple ways to address describing the device to memory
> >>>>>> paths, so you all had better work out a common solution.
> >>>>>
> >>>>> Looks like this fits exactly into the interconnect API concept. I see
> >>>>> MBUS as interconnect provider and display/camera as consumers, that
> >>>>> report their bandwidth needs. I am also planning to add support for
> >>>>> priority.
> >>>>
> >>>> Thanks for working on this. After looking at your serie, the one thing
> >>>> I'm a bit uncertain about (and the most important one to us) is how we
> >>>> would be able to tell through which interconnect the DMA are done.
> >>>>
> >>>> This is important to us since our topology is actually quite simple as
> >>>> you've seen, but the RAM is not mapped on that bus and on the CPU's,
> >>>> so we need to apply an offset to each buffer being DMA'd.
> >>>
> >>> Ok, i see - your problem is not about bandwidth scaling but about using
> >>> different memory ranges by the driver to access the same location. So
> >>> this is not really the same and your problem is different. Also the
> >>> interconnect bindings are describing a path and endpoints. However i am
> >>> open to any ideas.
> >>
> >> It may be different things you need, but both are related to the path
> >> between a bus master and memory. We can't have each 'problem'
> >> described in a different way. Well, we could as long as each platform
> >> has different problems, but that's unlikely.
> >>
> >> It could turn out that the only commonality is property naming
> >> convention, but that's still better than 2 independent solutions.
> >
> > Yeah, I really don't think the two issues are unrelated. Can we maybe
> > have a particular interconnect-names value to mark the interconnect
> > being used to perform DMA?
>
> We can call one of the paths "dma" and use it to perform DMA for the
> current device. I don't see a problem with this. The name of the path is
> descriptive and makes sense. And by doing we avoid adding more DT
> properties, which would be an other option.
That works for me. If Rob is fine with it too, I'll send an updated
version of my serie based on yours.
Thanks!
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2018-08-30 7:47 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-31 16:13 [PATCH v7 0/8] Introduce on-chip interconnect API Georgi Djakov
2018-07-31 16:13 ` [PATCH v7 1/8] interconnect: Add generic " Georgi Djakov
2018-08-02 0:05 ` Randy Dunlap
2018-08-02 11:58 ` Georgi Djakov
2018-08-03 22:59 ` Evan Green
2018-07-31 16:13 ` [PATCH v7 2/8] dt-bindings: Introduce interconnect provider bindings Georgi Djakov
2018-08-02 21:02 ` Rob Herring
2018-08-07 14:54 ` Georgi Djakov
2018-08-20 15:32 ` [PATCH " Maxime Ripard
2018-08-24 14:51 ` Georgi Djakov
2018-08-24 15:35 ` Rob Herring
2018-08-27 15:11 ` Maxime Ripard
2018-08-29 12:33 ` Georgi Djakov
2018-08-30 7:47 ` Maxime Ripard [this message]
2018-08-27 15:08 ` Maxime Ripard
2018-08-29 12:31 ` Georgi Djakov
2018-07-31 16:13 ` [PATCH v7 3/8] interconnect: Add debugfs support Georgi Djakov
2018-08-03 22:59 ` Evan Green
2018-07-31 16:13 ` [PATCH v7 4/8] interconnect: qcom: Add RPM communication Georgi Djakov
2018-08-03 22:59 ` Evan Green
2018-07-31 16:13 ` [PATCH v7 5/8] dt-bindings: interconnect: Document qcom, msm8916 NoC bindings Georgi Djakov
2018-07-31 16:13 ` [PATCH v7 6/8] interconnect: qcom: Add msm8916 interconnect provider driver Georgi Djakov
2018-08-03 22:59 ` Evan Green
2018-07-31 16:13 ` [PATCH v7 7/8] dt-bindings: Introduce interconnect consumers bindings Georgi Djakov
2018-07-31 16:13 ` [PATCH v7 8/8] interconnect: Allow endpoints translation via DT Georgi Djakov
2018-08-01 22:57 ` skannan
2018-08-02 12:07 ` Georgi Djakov
2018-08-02 19:12 ` skannan
2018-08-09 14:17 ` Georgi Djakov
2018-08-03 22:59 ` Evan Green
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