From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E75BC5B576 for ; Thu, 27 Jun 2019 21:14:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4897B2133F for ; Thu, 27 Jun 2019 21:14:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561670095; bh=aF18PB9ndCbQ/0tO043NbIEQd0ErKNrDAli6X2roWq0=; h=In-Reply-To:References:To:From:Subject:Cc:Date:List-ID:From; b=EW4CP63+jMI1MvOFwzlfQaRBklhrV/VgdCS5SOLndP8ArxcGeHQCUxBbK30uMfUSY lf3GL71zsVZrRjJ2SzFAqhaFyaTYkE7tqtwyJ13el8MQjm6JuECR8awutYdDnAUt74 KfhPdhQDKu+h5YiXlp+8kQgJa4mGLfKj0Gg5tfTY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726465AbfF0VOy (ORCPT ); Thu, 27 Jun 2019 17:14:54 -0400 Received: from mail.kernel.org ([198.145.29.99]:51460 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726441AbfF0VOy (ORCPT ); Thu, 27 Jun 2019 17:14:54 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 37FF4208CB; Thu, 27 Jun 2019 21:14:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561670093; bh=aF18PB9ndCbQ/0tO043NbIEQd0ErKNrDAli6X2roWq0=; h=In-Reply-To:References:To:From:Subject:Cc:Date:From; b=CNMciDmGkyUYWNkDg4WtU6vSG5PpIaJeyI1Upn0mozqwrcBTJRUhBZhl8YEV0+/Zv WN4ik+trQwPg6qycA+od0fYc9/pkYm3PLK6t//UKhFyPMmNX0+GkThhgWqnArchKwB PXUS29YhxcVR4eRS9/ga35BFDW8O+jwqMn5mUEJo= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <475e0250b1e77a660c095749e78427fde318d5f6.1559200405.git.leonard.crestez@nxp.com> References: <475e0250b1e77a660c095749e78427fde318d5f6.1559200405.git.leonard.crestez@nxp.com> To: Alexandre Bailon , Jacky Bai , Leonard Crestez , Michael Turquette From: Stephen Boyd Subject: Re: [RFC] clk: imx8mm: Add dram freq switch support Cc: Viresh Kumar , Anson Huang , Abel Vesa , Peng Fan , Shawn Guo , Aisheng Dong , Fabio Estevam , Georgi Djakov , Cedric Neveux , Silvano Di Ninno , Nitin Garg , "Rafael J. Wysocki" , Krzysztof Kozlowski , "linux-pm@vger.kernel.org" , "linux-clk@vger.kernel.org" , "kernel@pengutronix.de" , dl-linux-imx , "linux-arm-kernel@lists.infradead.org" User-Agent: alot/0.8.1 Date: Thu, 27 Jun 2019 14:14:52 -0700 Message-Id: <20190627211453.37FF4208CB@mail.kernel.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Quoting Leonard Crestez (2019-05-30 00:13:51) > Add a wrapper clock encapsulating dram frequency switch support for > imx8m chips. This allows higher-level DVFS code to manipulate dram > frequency using standard clock framework APIs. >=20 > Linux-side implementation is similar in principle to imx_clk_cpu or a > composite clock. Only some preparation is done inside the kernel, the > actual freq switch is performed from TF-A code which runs from an SRAM > area. Cores other than the one performing the switch are also made to > spin inside TF-A by sending each an IRQ. >=20 > This is an early proof-of-concept which only support low/high mode on > imx8mm but NXP has secure-world dram freq switching implementations for > multiple other chips and this approach can be extended. >=20 > This was tested using a large pile of NXP out-of-tree patches. Code for > the "busfreq core" from last release can be seen here: > https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/soc/imx= /busfreq-imx8mq.c?h=3Dimx_4.14.98_2.0.0_ga >=20 > It can be likely made to work with interconnect RFC: > https://patchwork.kernel.org/cover/10851705/ >=20 > This RFC effectively refactors a common part between them. >=20 > Among the possible cleanups: > * Handle errors in low/high busfreq code and back off > * Move irq to secure world > * Try to use fewer clk parameters > * More chips and frequencies >=20 > Many platforms handle this kind of stuff externally but cpufreq is quite > insistent that actual rates are set by clk code and that new platforms > use cpufreq-dt. >=20 > Let me know if there are objections to handling dram freq via clk. Can it be an interconnect driver instead? I don't see how this is a clk driver. It looks more like a driver that itself manages a collection of clks, and you've put the coordination of those clks behind the clk_ops interface. We don't want to have clk_ops calling clk consumer APIs in general, so the whole approach doesn't seem correct. Hopefully this can work out as some other sort of driver that is used directly from devfreq or interconnect core instead and then have a different consumer driver of devfreq or interconnect core that knows how to drive the clk tree.