From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B51BAC433FF for ; Thu, 8 Aug 2019 10:14:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8736121874 for ; Thu, 8 Aug 2019 10:14:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389774AbfHHKOk (ORCPT ); Thu, 8 Aug 2019 06:14:40 -0400 Received: from mga06.intel.com ([134.134.136.31]:45244 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389756AbfHHKOk (ORCPT ); Thu, 8 Aug 2019 06:14:40 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 03:14:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,360,1559545200"; d="scan'208";a="182551943" Received: from rajneesh-desk.iind.intel.com ([10.66.234.53]) by FMSMGA003.fm.intel.com with ESMTP; 08 Aug 2019 03:14:36 -0700 From: Rajneesh Bhardwaj To: x86@kernel.org Cc: Rajneesh Bhardwaj , bp@suse.de, Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Kan Liang , Peter Zijlstra , Qiuxu Zhuo , Len Brown , Thomas Gleixner , Linux PM Subject: [PATCH] x86/cpu: Add Elkhart Lake to Intel family Date: Thu, 8 Aug 2019 15:40:45 +0530 Message-Id: <20190808101045.19239-1-rajneesh.bhardwaj@linux.intel.com> X-Mailer: git-send-email 2.17.1 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Elkhart Lake is Atom based SoC that uses model number 0x96. CPUID details will be documented in a future version of Intel Software Development Manual. Cc: bp@suse.de Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Kan Liang Cc: Peter Zijlstra Cc: Qiuxu Zhuo Cc: Len Brown Cc: Thomas Gleixner Cc: x86-ml Cc: Linux PM Signed-off-by: Rajneesh Bhardwaj --- arch/x86/include/asm/intel-family.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 0278aa66ef62..06e94ae65f28 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -79,6 +79,7 @@ #define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */ #define INTEL_FAM6_ATOM_TREMONT_X 0x86 /* Jacobsville */ +#define INTEL_FAM6_ATOM_ELKHART_LAKE 0x96 /*Elkhart Lake */ /* Xeon Phi */ -- 2.17.1