Re: [PATCH 1/2] x86,sched: Add support for frequency invariance

[Peter Zijlstra <peterz@infradead.org>]

On Wed, Oct 02, 2019 at 02:27:54PM +0200, Giovanni Gherdovich wrote:
> On Tue, 2019-09-24 at 18:00 +0200, Peter Zijlstra wrote:
> > On Tue, Sep 24, 2019 at 04:03:32PM +0200, Peter Zijlstra wrote:
> > 
> > > > I'll check what's the cost of static_cpu_has() and if it's non-negligible I'll
> > > > do what you suggest (x86-specific version of arch_scale_freq_invariant().
> > > 
> > > static_cpu_has() is an alternative and ends up being a static branch
> > > (similar to static_key) once the alternative patching runs.
> > 
> > That said; I think you want a static key anyway, because if we can't
> > tell the max_freq we don't want to use the invariant stuff.
> > 
> > Something a little like so on top perhaps.
> > 
> > Also, the below fixes that silly tick_disable stuff.
> 
> Thanks for this patch, I'll add this change in v2.
> 
> Can you elaborate on what you don't like in the tick_disable mechanism?

Mostly because I dislike intel_pstate active mode a lot, but also
because it makes PELT behave differently between pstate and !pstate.

> > +static void init_scale_freq(void *arg)
> >  {
> >  	u64 aperf, mperf;
> >  
> > +	rdmsrl(MSR_IA32_APERF, aperf);
> > +	rdmsrl(MSR_IA32_MPERF, mperf);
> > +
> > +	this_cpu_write(arch_prev_aperf, aperf);
> > +	this_cpu_write(arch_prev_mperf, mperf);
> > +}
> > +

> > @@ -1940,5 +1949,6 @@ void x86_arch_scale_freq_tick_enable(voi
> >  
> >  void x86_arch_scale_freq_tick_disable(void)
> >  {
> > +	on_each_cpu(init_scale_freq, NULL, 1);
> >  	tick_disable = true;
> 
> I don't see why the call init_scale_freq() here is needed; why would I care of
> what's in arch_prev_[am]perf at this point. arch_scale_freq_tick() will see
> that tick_disable == true and exit early before reading arch_prev_[am]perf.

You're right, we should reset the prev values on enable. Otherwise the
first tick after enable will see 'weird' values.