From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A26FC28CBC for ; Wed, 6 May 2020 12:49:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 550E720575 for ; Wed, 6 May 2020 12:49:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728493AbgEFMtm (ORCPT ); Wed, 6 May 2020 08:49:42 -0400 Received: from foss.arm.com ([217.140.110.172]:35878 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728081AbgEFMtm (ORCPT ); Wed, 6 May 2020 08:49:42 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B00411FB; Wed, 6 May 2020 05:49:41 -0700 (PDT) Received: from bogus (unknown [10.37.8.198]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 62EE53F68F; Wed, 6 May 2020 05:49:39 -0700 (PDT) Date: Wed, 6 May 2020 13:49:32 +0100 From: Sudeep Holla To: Hanjun Guo Cc: Xiongfeng Wang , rjw@rjwysocki.net, viresh.kumar@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, john.garry@huawei.com, Jonathan Cameron , Souvik Chakravarty , Thanu Rangarajan Subject: Re: [RFC PATCH] cpufreq: add support for HiSilicon SoC HIP09 Message-ID: <20200506124932.GA20426@bogus> References: <1588227599-46438-1-git-send-email-wangxiongfeng2@huawei.com> <20200430095559.GB28579@bogus> <3ba950dd-4065-e4a5-d406-dc5c6c1781a7@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3ba950dd-4065-e4a5-d406-dc5c6c1781a7@huawei.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org + Thanu, Souvik who work with ASWG On Wed, May 06, 2020 at 05:36:51PM +0800, Hanjun Guo wrote: > Hi Sudeep, > > On 2020/4/30 17:55, Sudeep Holla wrote: > > On Thu, Apr 30, 2020 at 02:19:59PM +0800, Xiongfeng Wang wrote: > > > HiSilicon SoC has a separate System Control Processor(SCP) dedicated for > > > clock frequency adjustment and has been using the cpufreq driver > > > 'cppc-cpufreq'. New HiSilicon SoC HIP09 add support for CPU Boost, but > > > ACPI CPPC doesn't support this. In HiSilicon SoC HIP09, each core has > > > its own clock domain. It is better for the core itself to adjust its > > > frequency when we require fast response. In this patch, we add a > > > separate cpufreq driver for HiSilicon SoC HIP09. > > > > > > > I disagree with this approach unless you have tried to extend the CPPC > > in ACPI to accommodate this boost feature you need. Until you show those > > efforts and disagreement to do that from ASWG, I am NACKing this approach. > > Unfortunately we are not in ASWG at now, could you please give some > help about extending CPPC in ACPI to support boost feature? > You may have to provide more details than the commit log for sure as I haven't understood the boost feature and what is missing in ACPI CPPC. -- Regards, Sudeep